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2020 – today
- 2023
[c19]Chiu-Chin Chen
, Chia-Chun Liao:
The impact of COVID-19 on the development of online stores in cross-border operations - Amazon as an example. ICCE-Taiwan 2023: 575-576- [c18]Chiu-Chin Chen, Chia-Chun Liao:
The impact of COVID-19 on the development of online stores in cross-border operations - Amazon as an example. ICCE-Taiwan 2023: 577-578 - 2022
- [c17]Chia-Chun Liao, Chiu-Chin Chen:
Research on the effectiveness of e-commerce in poverty alleviation and agricultural assistance. ICCE-TW 2022: 157-158 - [c16]Chiu-Chin Chen, Chia-Chun Liao:
Research on the success factors of short video e-commerce. ICCE-TW 2022: 159-160 - 2021
- [j5]Chao-Chieh Li, Min-Shueh Yuan, Chia-Chun Liao, Chih-Hsien Chang, Yu-Tso Lin, Tsung-Hsien Tsai, Tien-Chien Huang, Hsien-Yuan Liao, Chung-Ting Lu, Hung-Yi Kuo, Augusto Ronchini Ximenes, Robert Bogdan Staszewski:
A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1881-1891 (2021) - [c15]Chiu-Chin Chen, Chia-Chun Liao:
Research on the development of Fintech combined with AIoT. ICCE-TW 2021: 1-2 - [c14]Chia-Chun Liao, Chiu-Chin Chen:
Study the development of 5G applications in Mixed Reality. ICCE-TW 2021: 1-2 - [c13]Chia-Chun Liao, Chiu-Chin Chen:
Research on the use of AIoT and 5G in Mobile Commerce. ICCE-TW 2021: 1-2 - [c12]Tsung-Che Lu, Chin-Ming Fu, Chia-Chun Liao, Yu-Tso Lin, Chih-Hsien Chang, Kenny Hsieh:
A Cost-Effective On-Chip Power Impedance Measurement (PIM) System in 7nm FinFET for HPC Applications. VLSI Circuits 2021: 1-2 - 2020
- [j4]Chao-Chieh Li, Min-Shueh Yuan, Yu-Tso Lin, Chia-Chun Liao, Chih-Hsien Chang, Robert Bogdan Staszewski:
A 0.2-V Three-Winding Transformer-Based DCO in 16-nm FinFET CMOS. IEEE Trans. Circuits Syst. 67-II(12): 2878-2882 (2020) - [c11]Chiu-Chin Chen, Chia-Chun Liao:
Research the Financial Networking Market Trading Behavior and Physics. ICCE-TW 2020: 1-2 - [c10]Chia-Chun Liao, Chiu-Chin Chen:
Using Collaborative Physics Technologies to Integrate Enterprise Cloud Services. ICCE-TW 2020: 1-2 - [c9]Mao-Hsuan Chou, Ya-Tin Chang, Tsung-Hsien Tsai, Tsung-Che Lu, Chia-Chun Liao, Hung-Yi Kuo, Ruey-Bin Sheen, Chih-Hsien Chang, Kenny C.-H. Hsieh, Alvin Leng Sun Loke, Mark Chen:
Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH 1-1-1 ΔΣ Time-to-Digital Converter in 7nm CMOS. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [c8]Chiu-Chin Chen, Chia-Chun Liao:
Forecasting Financial Market Trading Behavior by Physical and Market Profiles. ICCE-TW 2019: 1-2 - [c7]Chiu-Chin Chen, Chia-Chun Liao, Hsueh-Hua Chen, Hsing-Wen Milton Wang, Wu-Xiong Zhuo:
The Effect of Personal Innovativeness on Mobile Payment to Behavioral Intentions Perceived Enjoyment as a Moderator. ICCE-TW 2019: 1-2 - [c6]Chia-Chun Liao, Chiu-Chin Chen:
Developing Cause-Effect Relational Evaluation Model to Approach Alarm Management System. ICCE-TW 2019: 1-2 - 2018
- [j3]Chao-Chieh Li, Min-Shueh Yuan, Chia-Chun Liao, Yu-Tso Lin, Chih-Hsien Chang, Robert Bogdan Staszewski:
All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and ≤0.45-V Supply. IEEE J. Solid State Circuits 53(12): 3660-3671 (2018) - [c5]Min-Shueh Yuan, Chao-Chieh Li, Chia-Chun Liao, Yu-Tso Lin, Chih-Hsien Chang, Robert Bogdan Staszewski:
A 0.45V sub-mW all-digital PLL in 16nm FinFET for bluetooth low-energy (BLE) modulation and instantaneous channel hopping using 32.768kHz reference. ISSCC 2018: 448-450 - 2017
- [c4]Chao-Chieh Li, Min-Shueh Yuan, Chih-Hsien Chang, Yu-Tso Lin, Chia-Chun Liao, Kenny Hsieh, Mark Chen, Robert Bogdan Staszewski:
19.6 A 0.2V trifilar-coil DCO with DC-DC converter in 16nm FinFET CMOS with 188dB FOM, 1.3kHz resolution, and frequency pushing of 38MHz/V for energy harvesting applications. ISSCC 2017: 332-333 - 2016
- [c3]Chao-Chieh Li, Tsung-Hsien Tsai, Min-Shueh Yuan, Chia-Chun Liao, Chih-Hsien Chang, Tien-Chien Huang, Hsien-Yuan Liao, Chung-Ting Lu, Hung-Yi Kuo, Kenny Hsieh, Mark Chen, Augusto Ronchini Ximenes, Robert Bogdan Staszewski:
A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS. VLSI Circuits 2016: 1-2 - 2015
- [c2]Tsung-Hsien Tsai, Min-Shueh Yuan, Chih-Hsien Chang, Chia-Chun Liao, Chao-Chieh Li, Robert Bogdan Staszewski:
14.5 A 1.22ps integrated-jitter 0.25-to-4GHz fractional-N ADPLL in 16nm FinFET CM0S. ISSCC 2015: 1-3 - 2012
- [j2]Chia-Chun Liao, Pei-Yun Tsai, Tzi-Dar Chiueh:
Low-Complexity Cell Search Algorithm for Interleaved Concatenation ML-Sequences in 3GPP-LTE Systems. IEEE Wirel. Commun. Lett. 1(4): 280-283 (2012) - 2010
- [j1]Che-Wei Chang, Cheng-Ru Wu, Chia-Chun Liao:
The Virtual Cooperation Platform in Enterprise and Supplier Cooperation Models. Cyberpsychology Behav. Soc. Netw. 13(4): 473-475 (2010) - [c1]Che-Wei Chang, Cheng-Ru Wu, Chia-Chun Liao, Juo-Yi Sun, Ming-Yu Chou:
Developing a decision support tool to evaluate the collaborative technology of software contractor performance. ICIS 2010: 460-464
Coauthor Index
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