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2020 – today
- 2024
[i7]Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay:
Scalable Test Generation to Trigger Rare Targets in High-Level Synthesizable IPs for Cloud FPGAs. CoRR abs/2405.19948 (2024)- 2023
- [i6]Mukta Debnath, Krishnendu Guha, Debasri Saha, Susmita Sur-Kolay:
AgEncID: Aggregate Encryption Individual Decryption of Key for FPGA Bitstream IP Cores in Cloud. CoRR abs/2309.16282 (2023) - 2022
- [j17]Amit Saha
, Ritajit Majumdar, Debasri Saha, Amlan Chakrabarti, Susmita Sur-Kolay:
Faster search of clustered marked states with lackadaisical quantum walks. Quantum Inf. Process. 21(8): 275 (2022) - [c27]Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay:
GreyConE: Greybox Fuzzing + Concolic Execution Guided Test Generation for High Level Designs. ITC 2022: 494-498 - [i5]Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay:
Test Generation for SystemC designs by interlaced Greybox Fuzzing and Concolic Execution. CoRR abs/2205.04047 (2022) - 2021
- [j16]Amit Saha, Debasri Saha, Amlan Chakrabarti:
Circuit Design for k-Coloring Problem and Its Implementation in Any Dimensional Quantum System. SN Comput. Sci. 2(6): 427 (2021) - [j15]Debasri Saha, Susmita Sur-Kolay:
Minimization of WCRT with Recovery Assurance from Hardware Trojans for Tasks on FPGA-based Cloud. ACM Trans. Embed. Comput. Syst. 20(1): 1:1-1:25 (2021) - [c26]Piyali Ganguly, Amlan Chakrabarti, Debasri Saha:
"Fog-Miner" Based Resource Aware scalable Framework Development in IoT platform. iSES 2021: 204-209 - [i4]Amit Saha, Debasri Saha, Amlan Chakrabarti:
Circuit Design for k-coloring Problem and Its Implementation in Any Dimensional Quantum System. CoRR abs/2105.14281 (2021) - [i3]Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha, Susmita Sur-Kolay:
FuCE: Fuzzing+Concolic Execution guided Trojan Detection in Synthesizable Hardware Designs. CoRR abs/2111.00805 (2021) - 2020
- [j14]Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti:
Dynamic power-aware scheduling of real-time tasks for FPGA-based cyber physical systems against power draining hardware trojan attacks. J. Supercomput. 76(11): 8972-9009 (2020) - [c25]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
Blockchain Technology Enabled Pay Per Use Licensing Approach for Hardware IPs. DATE 2020: 1618-1621 - [c24]Amit Saha, Debasri Saha, Amlan Chakrabarti:
Circuit Design for K-coloring Problem and its Implementation on Near-term Quantum Devices. iSES 2020: 17-22 - [c23]Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti:
Ensuring Green Computing in Reconfigurable Hardware based Cloud Platforms from Hardware Trojan Attacks. TENCON 2020: 1380-1385 - [c22]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
A Multi-Agent Co-operative Model to Facilitate Criticality based Reliability for Mixed Critical Task Execution on FPGA based Cloud Environment. VLSID 2020: 143-148 - [i2]Amit Saha, Debasri Saha, Amlan Chakrabarti:
Circuit Design for K-coloring Problem and it's Implementation on Near-term Quantum Devices. CoRR abs/2009.06073 (2020) - [i1]Amit Saha, Ritajit Majumdar, Debasri Saha, Amlan Chakrabarti, Susmita Sur-Kolay:
Asymptotically Improved Grover's Algorithm in any Dimensional Quantum System with Novel Decomposed n-qudit Toffoli Gate. CoRR abs/2012.04447 (2020)
2010 – 2019
- 2019
- [j13]Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti, Sayani Bindai:
A CAD approach for pre-layout optimal PDN design and its post-layout verification. Microprocess. Microsystems 65: 158-168 (2019) - [j12]Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti:
Criticality based reliability against hardware Trojan attacks for processing of tasks on reconfigurable hardware. Microprocess. Microsystems 71 (2019) - [j11]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
Stigmergy-Based Security for SoC Operations From Runtime Performance Degradation of SoC Components. ACM Trans. Embed. Comput. Syst. 18(2): 14:1-14:26 (2019) - [j10]Debasri Saha, Susmita Sur-Kolay:
Guided GA-Based Multiobjective Optimization of Placement and Assignment of TSVs in 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1742-1750 (2019) - [c21]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
Zero Knowledge Authentication for Reuse of IPs in Reconfigurable Platforms. TENCON 2019: 2040-2045 - 2018
- [c20]Tanmay Biswas, Shuvadeep Bhattacharjee, Sudhindu Bikash Mandal, Debasri Saha, Amlan Chakrabarti:
FPGA-Based Novel Speech Enhancement System Using Microphone Activity Detector. ACSS (1) 2018: 117-127 - [c19]Krishnendu Guha, Atanu Majumder, Debasri Saha, Amlan Chakrabarti:
Reliability Driven Mixed Critical Tasks Processing on FPGAs Against Hardware Trojan Attacks. DSD 2018: 537-544 - [c18]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
SARP: Self Aware Runtime Protection Against Integrity Attacks of Hardware Trojans. VDAT 2018: 198-209 - 2017
- [j9]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos. ACM J. Emerg. Technol. Comput. Syst. 13(3): 41:1-41:26 (2017) - [j8]Tanmay Biswas, Sudhindu Bikash Mandal, Debasri Saha, Amlan Chakrabarti:
Coherence based dual microphone speech enhancement technique using FPGA. Microprocess. Microsystems 55: 111-118 (2017) - [c17]Tanmay Biswas, Sudhindu Bikash Mandal, Debasri Saha, Amlan Chakrabarti:
Dual Microphone Sound Source Localization Using Reconfigurable Hardware. CICBA (1) 2017: 397-406 - [c16]Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti:
A CAD approach for on-chip PDN with power and supply noise reduction for multi-voltage SOCS in pre-layout stage. ISED 2017: 1-4 - [c15]Debasri Saha, Susmita Sur-Kolay:
Multi-objective Optimization of Placement and Assignment of TSVs in 3D ICs. VLSID 2017: 372-377 - [c14]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans at Runtime. VLSID 2017: 417-422 - 2016
- [j7]Debasri Saha, Susmita Sur-Kolay:
Embedding of signatures in reconfigurable scan architecture for authentication of intellectual properties in system-on-chip. IET Comput. Digit. Tech. 10(3): 110-118 (2016) - [c13]Moumita Chakraborty, Amlan Chakrabarti, Partha Mitra, Debasri Saha, Krishnendu Guha:
Pre-layout module wise decap allocation for noise suppression and accurate delay estimation of SoC. VDAT 2016: 1-6 - 2015
- [j6]Moumita Chakraborty, Krishnendu Guha, Debasri Saha, Partha Mitra, Amlan Chakrabarti:
Pre-Layout Decoupling Capacitance Estimation and Allocation for Noise-Aware Crypto-System on Chip Applications. J. Low Power Electron. 11(3): 333-339 (2015) - [j5]Debasri Saha, Susmita Sur-Kolay:
Watermarking in Hard Intellectual Property for Pre-Fab and Post-Fab Verification. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 801-809 (2015) - [c12]Debasri Saha:
Adaptive Multilayer Routing for Incremental Design of an SoC. FICTA 2015: 657-665 - [c11]Krishnendu Guha, Debasri Saha, Amlan Chakrabarti:
RTNA: Securing SOC architectures from confidentiality attacks at runtime using ART1 neural networks. VDAT 2015: 1-6 - 2014
- [c10]Debasri Saha, Susmita Sur-Kolay:
Trusted sharing of intellectual property in electronic hardware design. WESS 2014: 9:1-9:3 - [c9]Krishnendu Guha, Romio Rosan Sahani, Moumita Chakraborty, Amlan Chakrabarti, Debasri Saha:
Analysis of Secret Key Revealing Trojan Using Path Delay Analysis for Some Cryptocores. FICTA (2) 2014: 13-20 - [c8]Moumita Chakraborty, Krishnendu Guha, Amlan Chakrabarti, Debasri Saha:
Analysis of power distribution network for some cryptocores. ICACCI 2014: 2618-2622 - 2012
- [j4]Debasri Saha, Susmita Sur-Kolay:
Secure Public Verification of IP Marks in FPGA Design Through a Zero-Knowledge Protocol. IEEE Trans. Very Large Scale Integr. Syst. 20(10): 1749-1757 (2012) - 2011
- [j3]Pritha Banerjee, Debasri Saha, Susmita Sur-Kolay:
Cone-based placement for field programmable gate arrays. IET Comput. Digit. Tech. 5(1): 49-62 (2011) - [j2]Debasri Saha, Susmita Sur-Kolay:
SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection. VLSI Design 2011: 731957:1-731957:10 (2011) - 2010
- [j1]Debasri Saha, Susmita Sur-Kolay:
Robust intellectual property protection of VLSI physical design. IET Comput. Digit. Tech. 4(5): 388-399 (2010) - [c7]Debasri Saha, Susmita Sur-Kolay:
A Unified Approach for IP Protection across Design Phases in a Packaged Chip. VLSI Design 2010: 105-110
2000 – 2009
- 2009
- [c6]Debasri Saha, Susmita Sur-Kolay:
Secure Leakage-Proof Public Verification of IP Marks in VLSI Physical Design. ISVLSI 2009: 169-174 - [c5]Debasri Saha, Susmita Sur-Kolay:
Encoding of Floorplans through Deterministic Perturbation. VLSI Design 2009: 315-320 - 2008
- [c4]Debasri Saha, Susmita Sur-Kolay:
An Analytical Approach to Direct IP Protection of VLSI Floorplans. ICIIS 2008: 1-6 - 2007
- [c3]Debasri Saha, Susmita Sur-Kolay:
Fast Robust Intellectual Property Protection for VLSI Physical Design. ICIT 2007: 1-6 - [c2]Debasri Saha, Parthasarathi Dasgupta, Susmita Sur-Kolay, Samar Sen-Sarma:
A Novel Scheme for Encoding and Watermark Embedding in VLSI Physical Design for IP Protection. ICCTA 2007: 111-116 - 2006
- [c1]Debasri Saha, Rajat Kumar Pal, Samar Sen-Sarma:
A Mimetic Algorithm for Refinement of Lower Bound of Number of Tracks in Channel Routing Problem. Intelligent Information Processing 2006: 307-316
Coauthor Index
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last updated on 2024-06-25 21:51 CEST by the dblp team
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