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2020 – today
- 2024
[i2]Suchisrit Gangopadhyay, Xien Chen, Michael Chu, Patrick Rim, Hyoungseob Park, Alex Wong:
UnCLe: Unsupervised Continual Learning of Depth Completion. CoRR abs/2410.18074 (2024)- 2023
- [j18]Shankara Pailoor
, Yanju Chen, Franklyn Wang, Clara Rodríguez-Núñez, Jacob Van Geffen, Jason Morton, Michael Chu, Brian Gu, Yu Feng, Isil Dillig:
Automated Detection of Under-Constrained Circuits in Zero-Knowledge Proofs. Proc. ACM Program. Lang. 7(PLDI): 1510-1532 (2023) - [i1]Shankara Pailoor, Yanju Chen, Franklyn Wang, Clara Rodríguez-Núñez, Jacob Van Gaffen, Jason Morton, Michael Chu, Brian Gu, Yu Feng, Isil Dillig:
Automated Detection of Underconstrained Circuits for Zero-Knowledge Proofs. IACR Cryptol. ePrint Arch. 2023: 512 (2023)
2010 – 2019
- 2019
- [j17]Michael Chu, Thao Nguyen, Vaibhav Pandey, Yongxiao Zhou, Hoang N. Pham, Ronen Bar-Yoseph, Shlomit Radom-Aizik, Ramesh C. Jain, Dan M. Cooper, Michelle Khine:
Respiration rate and volume measurements using wearable strain sensors. npj Digit. Medicine 2 (2019) - 2015
- [j16]Mitchell R. LeRoy, Srikumar Raman, Michael Chu, Jin Woo Kim, Jong-Ru Guo, Kuan Zhou, Chao You, Ryan Clarke, Bryan S. Goda, John F. McDonald:
High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology. Proc. IEEE 103(7): 1181-1196 (2015) - 2014
- [j15]Xuelian Liu, Mitchell R. LeRoy, Ryan Clarke, Michael Chu, H. O. Aquino, Srikumar Raman, Aamir Zia, Russell P. Kraft, John F. McDonald:
Design of BiCMOS SRAMs for high-speed SiGe applications. IET Circuits Devices Syst. 8(6): 487-498 (2014) - [j14]Xuelian Liu, Srikumar Raman, Ryan Clarke, Mitchell R. LeRoy, Okan Erdogan, Michael Chu, Alexey Gutin, Russell P. Kraft, John F. McDonald:
Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 61-II(3): 178-182 (2014) - 2011
- [j13]Jin Woo Kim, Michael Chu, Philip Jacob, Aamir Zia, Russell P. Kraft, John F. McDonald:
Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications. IET Circuits Devices Syst. 5(3): 159-169 (2011) - [j12]Alexey Gutin, Philip Jacob, Michael Chu, Paul M. Belemjian, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald:
Carry Chains for Ultra High-Speed SiGe HBT Adders. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2201-2210 (2011) - 2010
- [j11]Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald:
A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology. IEEE J. Solid State Circuits 45(2): 380-390 (2010) - [j10]Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald:
Correction to "A 40 GS/s Time Interleaved ADC Using SiGe BiCMOS Technology". IEEE J. Solid State Circuits 45(10): 2210 (2010) - [j9]Aamir Zia, Philip Jacob, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald:
A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 967-977 (2010)
2000 – 2009
- 2009
- [j8]Amr M. Bayoumi, Michael Chu, Yasser Y. Hanafy, Patricia Harrell, Gamal Refai-Ahmed:
Scientific and Engineering Computing Using ATI Stream Technology. Comput. Sci. Eng. 11(6): 92-97 (2009) - [j7]Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald, Kerry Bernstein:
Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks. Proc. IEEE 97(1): 108-122 (2009) - [c17]John F. McDonald, Okan Erdogan, Philip Jacob, Paul M. Belemjian, Alexey Gutin, Aamir Zia, Michael Chu, Jin Woo Kim, Ryan Clarke, Nate DeSimone, Sherry Liu, Russell P. Kraft:
Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers. 3DIC 2009: 1-7 - 2007
- [j6]Young Uk Yim, Peter F. Curran, Michael Chu, John F. McDonald, Russell P. Kraft:
52 Gb/s 16: 1 transmitter in 0.13 μm SiGe BiCMOS technology. IET Circuits Devices Syst. 1(6): 427-432 (2007) - [j5]Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Bryan S. Goda, John F. McDonald:
A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits. IEEE Trans. Very Large Scale Integr. Syst. 15(9): 1051-1054 (2007) - [c16]Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Peng Jin, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald:
Amdahl's figure of merit, SiGe HBT BiCMOS, and 3D chip stacking. ICCD 2007: 202-207 - 2006
- [j4]André DeHon, Yury Markovsky, Eylon Caspi, Michael Chu, Randy Huang, Stylianos Perissakis, Laura Pozzi, Joseph Yeh, John Wawrzynek:
Stream computations organized for reconfigurable execution. Microprocess. Microsystems 30(6): 334-354 (2006) - [c15]Sanjeev Kumar, Michael Chu, Christopher J. Hughes, Partha Kundu, Anthony D. Nguyen:
Hybrid transactional memory. PPoPP 2006: 209-220 - 2005
- [j3]Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. Integr. 38(3): 525-540 (2005) - [j2]Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald:
A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block. Microprocess. Microsystems 29(2-3): 121-131 (2005) - [c14]Chao You, Jong-Ru Guo, Michael Chu, Russell P. Kraft, Bryan S. Goda, John F. McDonald:
A 11 GHz FPGA with Test Applications. FPL 2005: 101-105 - [c13]Jong-Ru Guo, Chao You, Michael Chu, Okan Erdogan, Russell P. Kraft, John F. McDonald:
A High Speed Reconfigurable Gate Array for Gigahertz Applications. ISVLSI 2005: 124-129 - 2004
- [c12]Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald:
The gigahertz FPGA: design consideration and applications. FPGA 2004: 248 - [c11]Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald:
The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. ACM Great Lakes Symposium on VLSI 2004: 141-144 - 2003
- [c10]Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald:
A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA. Engineering of Reconfigurable Systems and Algorithms 2003: 181-187 - [c9]Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda:
A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. FPGA 2003: 248 - [c8]Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald:
Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. FPL 2003: 11-20 - [c7]Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald:
A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology. ACM Great Lakes Symposium on VLSI 2003: 37-40 - 2002
- [c6]Yury Markovsky, Eylon Caspi, Randy Huang, Joseph Yeh, Michael Chu, John Wawrzynek, André DeHon:
Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine. FPGA 2002: 196-205 - [c5]Kuan Zhou, Channakeshav, Michael Chu, Jong-Ru Guo, S.-C. Liu, Russell P. Kraft, Chao You, John F. McDonald:
Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes. FPT 2002: 182-188 - 2001
- [j1]Allison Woodruff, Chris Olston, Alexander Aiken, Michael Chu, Vuk Ercegovac, Mark Lin, Mybrid Spalding, Michael Stonebraker:
DataSplash: A Direct Manipulation Environment for Programming Semantic Zoom Visualizations of Tabular Data. J. Vis. Lang. Comput. 12(5): 551-571 (2001) - 2000
- [c4]Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, André DeHon:
Stream Computations Organized for Reconfigurable Execution (SCORE). FPL 2000: 605-614
1990 – 1999
- 1998
- [c3]Dirk Reese, Eric Chun, Sammy Cheung, Edmond Lau, Michael Chu, Gwen Liang, Nghia Van Tran, Brad Vest, Richard Smolen, Minchang Liang, Seshan Sekariapuram, Behzad Nouban, Myron Wong, John Costello, John Turner:
A 6.9 ns, 560 macrocell, in system programmable, CMOS PLD with 3.3-5 volt I/O capability. CICC 1998: 265-268 - [c2]Michael Chu, Nicholas Weaver, Kolja Sulimma, André DeHon, John Wawrzynek:
Object Oriented Circuit-Generators in Java. FCCM 1998: 158-166 - [c1]Chris Olston, Allison Woodruff, Alexander Aiken, Michael Chu, Vuk Ercegovac, Mark Lin, Mybrid Spalding, Michael Stonebraker:
DataSplash. SIGMOD Conference 1998: 550-552
Coauthor Index
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