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ORCIDJuan L. Aragón
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2020 – today
- 2024
[i4]Diya Joseph, Juan Luis Aragón, Joan-Manuel Parcerisa, Antonio González:
WaSP: Warp Scheduling to Mimic Prefetching in Graphics Workloads. CoRR abs/2404.06156 (2024)- 2023
- [j22]Aninda Manocha
, Juan L. Aragón, Margaret Martonosi:
Graphfire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics. IEEE Trans. Computers 72(1): 291-304 (2023) - [c35]Diya Joseph, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs. PACT 2023: 124-136 - [c34]Aninda Manocha, Zi Yan, Esin Tureci, Juan L. Aragón, David W. Nellans, Margaret Martonosi:
Architectural Support for Optimizing Huge Page Selection Within the OS. MICRO 2023: 1213-1226 - 2022
- [j21]David Corbalán-Navarro, Juan L. Aragón, Martí Anglada, Joan-Manuel Parcerisa, Antonio González:
Triangle Dropping: An Occluded-geometry Predictor for Energy-efficient Mobile GPUs. ACM Trans. Archit. Code Optim. 19(3): 39:1-39:20 (2022) - [j20]Juan Mompean, Juan L. Aragón, Pablo Artal:
Energy-efficient design of a presbyopia correction wearable powered by mobile GPUs and FPGAs. J. Supercomput. 78(9): 11657-11679 (2022) - [j19]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Antonio González:
Dynamic sampling rate: harnessing frame coherence in graphics applications for energy-efficient GPUs. J. Supercomput. 78(13): 14940-14964 (2022) - [j18]David Corbalán-Navarro, Juan L. Aragón, Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Antonio González:
Omega-Test: A Predictive Early-Z Culling to Improve the Graphics Pipeline Energy-Efficiency. IEEE Trans. Vis. Comput. Graph. 28(12): 4375-4388 (2022) - [c33]Diya Joseph, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
TCOR: A Tile Cache with Optimal Replacement. HPCA 2022: 662-675 - [c32]Aninda Manocha, Zi Yan, Esin Tureci, Juan L. Aragón, David W. Nellans, Margaret Martonosi:
The Implications of Page Size Management on Graph Analytics. IISWC 2022: 199-214 - [c31]Marcelo Orenes-Vera, Aninda Manocha, Jonathan Balkind, Fei Gao, Juan L. Aragón, David Wentzlaff, Margaret Martonosi:
Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs. ISCA 2022: 817-830 - [c30]Jorge Ortiz, David Corbalán-Navarro, Juan L. Aragón, Antonio González:
MEGsim: A Novel Methodology for Efficient Simulation of Graphics Workloads in GPUs. ISPASS 2022: 69-78 - [c29]Diya Joseph, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
DTexL: Decoupled Raster Pipeline for Texture Locality. MICRO 2022: 213-227 - [c28]David Corbalán-Navarro, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
DTM-NUCA: Dynamic Texture Mapping-NUCA for Energy-Efficient Graphics Rendering. PDP 2022: 144-151 - [d1]Aninda Manocha, Zi Yan, Esin Tureci, Juan Luis Aragón, David W. Nellans, Margaret Martonosi:
The Implications of Page Size Management on Graph Analytics. Zenodo, 2022
- [i3]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Antonio González:
Dynamic Sampling Rate: Harnessing Frame Coherence in Graphics Applications for Energy-Efficient GPUs. CoRR abs/2202.10533 (2022) - 2021
- [j17]Aninda Manocha, Tyler Sorensen, Esin Tureci, Opeoluwa Matthews, Juan L. Aragón, Margaret Martonosi:
GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures. ACM Trans. Archit. Code Optim. 18(4): 53:1-53:26 (2021) - [j16]Martí Anglada, Ramon Canal, Juan L. Aragón, Antonio González:
Fast and Accurate SER Estimation for Large Combinational Blocks in Early Stages of the Design. IEEE Trans. Sustain. Comput. 6(3): 427-440 (2021) - 2020
- [c27]Tyler Sorensen, Aninda Manocha, Esin Tureci, Marcelo Orenes-Vera, Juan L. Aragón, Margaret Martonosi:
A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration. ICCAD 2020: 97:1-97:9 - [c26]Opeoluwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes-Vera, Esin Tureci, Tyler Sorensen, Tae Jun Ham, Juan L. Aragón, Luca P. Carloni, Margaret Martonosi:
MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems. ISPASS 2020: 136-148 - [i2]Opeoluwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes-Vera, Esin Tureci, Tyler Sorensen, Tae Jun Ham, Juan L. Aragón, Luca P. Carloni, Margaret Martonosi:
The MosaicSim Simulator (Full Technical Report). CoRR abs/2004.07415 (2020)
2010 – 2019
- 2019
- [j15]Juan Mompean, Juan L. Aragón, Pedro Prieto, Pablo Artal:
GPU-based processing of Hartmann-Shack images for accurate and high-speed ocular wavefront sensing. Future Gener. Comput. Syst. 91: 177-190 (2019) - [j14]Tae Jun Ham, Juan L. Aragón, Margaret Martonosi:
Efficient Data Supply for Parallel Heterogeneous Architectures. ACM Trans. Archit. Code Optim. 16(2): 9:1-9:23 (2019) - [c25]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Pedro Marcuello, Antonio González:
Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. HPCA 2019: 623-634 - [c24]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Antonio González:
Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline. HPCA 2019: 635-646 - 2018
- [j13]Juan Mompean, Juan L. Aragón, Pedro Prieto, Pablo Artal:
Design of an accurate and high-speed binocular pupil tracking system based on GPGPUs. J. Supercomput. 74(5): 1836-1862 (2018) - [i1]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Pedro Marcuello, Antonio González:
Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. CoRR abs/1807.09449 (2018) - 2017
- [j12]Tae Jun Ham, Juan L. Aragón, Margaret Martonosi:
Decoupling Data Supply from Computation for Latency-Tolerant Communication in Heterogeneous Architectures. ACM Trans. Archit. Code Optim. 14(2): 16:1-16:27 (2017) - 2016
- [c23]Martí Anglada, Ramon Canal, Juan L. Aragón, Antonio González:
MASkIt: Soft error rate estimation for combinational circuits. ICCD 2016: 614-621 - 2015
- [j11]Daniel Sánchez, Juan M. Cebrian, José M. García, Juan L. Aragón:
Soft-error mitigation by means of decoupled transactional memory threads. Distributed Comput. 28(2): 75-90 (2015) - [c22]Tae Jun Ham, Juan L. Aragón, Margaret Martonosi:
DeSC: decoupled supply-compute communication management for heterogeneous architectures. MICRO 2015: 191-203 - [c21]Juan Mompean, Juan L. Aragón, Pedro Prieto, Pablo Artal:
GPU-Accelerated High-Speed Eye Pupil Tracking System. SBAC-PAD 2015: 17-24 - 2014
- [j10]Juan M. Cebrian, Daniel Sánchez, Juan L. Aragón, Stefanos Kaxiras:
Managing power constraints in a single-core scenario through power tokens. J. Supercomput. 68(1): 414-442 (2014) - 2013
- [j9]Juan M. Cebrian, Daniel Sánchez, Juan L. Aragón, Stefanos Kaxiras:
Efficient inter-core power and thermal balancing for multicore processors. Computing 95(7): 537-566 (2013) - [j8]Daniel Sánchez, Yiannakis Sazeides, Juan M. Cebrian, José M. García, Juan L. Aragón:
Modeling the impact of permanent faults in caches. ACM Trans. Archit. Code Optim. 10(4): 29:1-29:23 (2013) - 2012
- [j7]Daniel Sánchez, Juan L. Aragón, José M. García:
A fault-tolerant architecture for parallel applications in tiled-CMPs. J. Supercomput. 61(3): 997-1023 (2012) - 2011
- [j6]Juan M. Cebrian, Juan L. Aragón, José M. García, Stefanos Kaxiras:
Leakage-efficient design of value predictors through state and non-state preserving techniques. J. Supercomput. 55(1): 28-50 (2011) - [c20]Juan M. Cebrian, Juan L. Aragón, Stefanos Kaxiras:
Token3D: Reducing Temperature in 3D Die-Stacked CMPs through Cycle-Level Power Control Mechanisms. Euro-Par (1) 2011: 295-309 - [c19]Daniel Sánchez, Yiannakis Sazeides, Juan L. Aragón, José M. García:
An analytical model for the calculation of the Expected Miss Ratio in faulty caches. IOLTS 2011: 252-257 - [c18]Juan M. Cebrian, Juan L. Aragón, Stefanos Kaxiras:
Power Token Balancing: Adapting CMPs to Power Constraints for Parallel Multithreaded Workloads. IPDPS 2011: 431-442 - 2010
- [j5]Antonio Flores, Manuel E. Acacio, Juan L. Aragón:
Exploiting address compression and heterogeneous interconnects for efficient message management in tiled CMPs. J. Syst. Archit. 56(9): 429-441 (2010) - [j4]Antonio Flores, Juan L. Aragón, Manuel E. Acacio:
Heterogeneous Interconnects for Energy-Efficient Message Management in CMPs. IEEE Trans. Computers 59(1): 16-28 (2010) - [c17]Pavlos Petoumenos, Georgia Psychou, Stefanos Kaxiras, Juan Manuel Cebrian Gonzalez, Juan L. Aragón:
MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance. ARCS 2010: 113-125 - [c16]Daniel Sánchez, Juan L. Aragón, José M. García:
A log-based redundant architecture for reliable parallel computation. HiPC 2010: 1-10 - [c15]Antonio Flores, Juan L. Aragón, Manuel E. Acacio:
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects. PDP 2010: 147-154
2000 – 2009
- 2009
- [c14]Daniel Sánchez, Juan L. Aragón, José M. García:
REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs. Euro-Par 2009: 321-333 - [c13]Juan M. Cebrian, Juan L. Aragón, José M. García, Pavlos Petoumenos, Stefanos Kaxiras:
Efficient microarchitecture policies for accurately adapting to power constraints. IPDPS 2009: 1-12 - [c12]Daniel Sánchez, Juan L. Aragón, José M. García:
Extending SRT for parallel applications in tiled-CMP architectures. IPDPS 2009: 1-8 - 2008
- [j3]Juan L. Aragón, Alexander V. Veidenbaum:
Optimizing CAM-based instruction cache designs for low-power embedded systems. J. Syst. Archit. 54(12): 1155-1163 (2008) - [j2]Antonio Flores, Juan L. Aragón, Manuel E. Acacio:
An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures. J. Supercomput. 45(3): 341-364 (2008) - [c11]Antonio Flores, Manuel E. Acacio, Juan L. Aragón:
Address Compression and Heterogeneous Interconnects for Energy-Efficient High-Performance in Tiled CMPs. ICPP 2008: 295-303 - 2007
- [c10]Antonio Flores, Juan L. Aragón, Manuel E. Acacio:
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures. AINA Workshops (1) 2007: 752-757 - [c9]Juan M. Cebrian, Juan L. Aragón, José M. García, Stefanos Kaxiras:
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors. Conf. Computing Frontiers 2007: 113-122 - [c8]Antonio Flores, Juan L. Aragón, Manuel E. Acacio:
Efficient Message Management in Tiled CMP Architectures Using a Heterogeneous Interconnection Network. HiPC 2007: 133-146 - [c7]Juan M. Cebrian, Juan L. Aragón, José M. García:
Leakage Energy Reduction in Value Predictors through Static Decay. IPDPS 2007: 1-7 - 2006
- [j1]Juan L. Aragón, José M. González, Antonio González:
Control Speculation for Energy-Efficient Next-Generation Superscalar Processors. IEEE Trans. Computers 55(3): 281-291 (2006) - 2005
- [c6]Juan L. Aragón, Alexander V. Veidenbaum:
Energy-Effective Instruction Fetch Unit for Wide Issue Processors. Asia-Pacific Computer Systems Architecture Conference 2005: 15-27 - 2004
- [c5]Juan L. Aragón, Dan Nicolaescu, Alexander V. Veidenbaum, Ana-Maria Badulescu:
Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors. DATE 2004: 1374-1375 - 2003
- [c4]Juan L. Aragón, José González, Antonio González:
Power-Aware Control Speculation through Selective Throttling. HPCA 2003: 103-112 - 2002
- [c3]Juan L. Aragón, José González, Antonio González, James E. Smith:
Dual path instruction processing. ICS 2002: 220-229 - 2001
- [c2]Juan L. Aragón, José González, José M. García, Antonio González:
Confidence Estimation for Branch Prediction Reversal. HiPC 2001: 214-223 - [c1]Juan L. Aragón, José González, José M. García, Antonio González:
Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow. ICCD 2001: 228-233
Coauthor Index
aka: Juan Manuel Cebrian Gonzalez
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