default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDLuc Claesen
Luc J. M. Claesen
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j21]Yiheng Huang
, Junhong Chen, Nick Michiels, Muhammad Asim, Luc Claesen, Wenyin Liu:
DistillGrasp: Integrating Features Correlation With Knowledge Distillation for Depth Completion of Transparent Objects. IEEE Robotics Autom. Lett. 9(10): 8945-8952 (2024)- [i1]Yiheng Huang, Junhong Chen, Nick Michiels, Muhammad Asim, Luc Claesen, Wenyin Liu:
DistillGrasp: Integrating Features Correlation with Knowledge Distillation for Depth Completion of Transparent Objects. CoRR abs/2408.00337 (2024) - 2023
- [j20]Guibiao Fang, Junhong Chen, Dayong Liang, Muhammad Asim, Frank Van Reeth, Luc Claesen, Zhenguo Yang, Wenyin Liu:
Feature Correlation Transformer for Estimating Ambiguous Optical Flow. Neural Process. Lett. 55(6): 7543-7559 (2023) - [j19]Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan:
Structured Term Pruning for Computational Efficient Neural Networks Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 190-203 (2023) - [j18]Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Xiaowen Jiang, Xiaolang Yan, Luc Claesen, Dehong Liu, Junjian Chen, Zhili Liu:
Structured Dynamic Precision for Deep Neural Networks Quantization. ACM Trans. Design Autom. Electr. Syst. 28(1): 12:1-12:24 (2023) - 2022
- [j17]Yuanlin Hong, Junhong Chen, Yu Cheng, Yishi Han, Frank Van Reeth, Luc Claesen, Wenyin Liu:
ClueDepth Grasp: Leveraging positional clues of depth for completing depth of transparent objects. Frontiers Neurorobotics 16 (2022) - [j16]Bowen Li, Dongliang Xiong, Kai Huang, Xiaowen Jiang, Hao Yao, Junjian Chen, Luc Claesen:
Sample-wise dynamic precision quantization for neural network acceleration. IEICE Electron. Express 19(16): 20220229 (2022) - [j15]Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong:
Structured precision skipping: Accelerating convolutional neural networks with budget-aware dynamic precision selection. J. Syst. Archit. 124: 102403 (2022) - [j14]Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong:
Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1902-1915 (2022) - 2021
- [c70]Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Luc Claesen:
DPOQ: Dynamic Precision Onion Quantization. ACML 2021: 502-517 - 2020
- [j13]Qi Wang, Jinxing Lai, Luc Claesen, Zhenguo Yang, Liang Lei, Wenyin Liu:
A novel feature representation: Aggregating convolution kernels for image retrieval. Neural Networks 130: 1-10 (2020) - [c69]Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Haitian Jiang, Luc Claesen:
DFQF: Data Free Quantization-aware Fine-tuning. ACML 2020: 289-304 - [c68]Siang Chen, Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Luc Claesen:
Adaptive Hybrid Composition Based Super-Resolution Network via Fine-Grained Channel Pruning. ECCV Workshops (3) 2020: 119-135 - [c67]Siang Chen, Kai Huang, Dongliang Xiong, Bowen Li, Luc Claesen:
Fine-Grained Channel Pruning for Deep Residual Neural Networks. ICANN (2) 2020: 3-14 - [c66]Aydin Emre Güzel, Dilara Hisar, Luc Claesen, H. Fatih Ugurdag:
Fast Incremental Least Square Pose Estimation for Hardware Implementation with Rolling Shutter Camera. SIU 2020: 1-4
2010 – 2019
- 2019
- [j12]Yanzhe Li, Luc Claesen, Kai Huang, Menglian Zhao:
A Real-Time High-Quality Complete System for Depth Image-Based Rendering on FPGA. IEEE Trans. Circuits Syst. Video Technol. 29(4): 1179-1193 (2019) - 2018
- [c65]Michiel Darcis, Wout Swinkels, Aydin Emre Guzel, Luc Claesen:
PoseLab: A Levenberg-Marquardt Based Prototyping Environment for Camera Pose Estimation. CISP-BMEI 2018: 1-6 - [c64]Laurens Le Jeune, Wout Swinkels, Yi Sun, Constantinus Politis, Luc Claesen:
Analysis of Collision Detection Using Implicit Sphere Tree in Saptic Interaction Environments for Maxillofacial Surgery Applications. CISP-BMEI 2018: 1-6 - 2017
- [c63]Kobe Bamps, Celine Cuypers, Luc Claesen, Pieter Koopman:
CT-based automatic identification and localization of the right phrenic nerve. CISP-BMEI 2017: 1-6 - [c62]Michiel Darcis, Gert Leurs, Kenny Geens, Alexandra Jankelevitch, Wout Swinkels, Luc Claesen:
Automated winston-lutz test for efficient quality control in stereotactic radiosurgery. CISP-BMEI 2017: 1-6 - [c61]Niels Pirotte, Casper Vranken, Wout Swinkels, Luc Claesen, Yi Sun, Constantinus Politis:
Haptic collision detection on highly complex medical data structures. CISP-BMEI 2017: 1-6 - [c60]Wout Swinkels, Luc Claesen, Feng Xiao, Haibin Shen:
Real-time SVM-based emotion recognition algorithm. CISP-BMEI 2017: 1-6 - [c59]Wout Swinkels, Luc Claesen, Feng Xiao, Haibin Shen:
SVM point-based real-time emotion detection. DSC 2017: 86-92 - [c58]Yanzhe Li, Kai Huang, Luc Claesen:
High-quality view interpolation based on depth maps and its hardware implementation. FPL 2017: 1-6 - 2016
- [c57]Yanzhe Li, Kai Huang, Luc Claesen:
SoC and FPGA oriented high-quality stereo vision system. FPL 2016: 1-4 - [c56]Po-Yen Chen, Chien Chen, Parthiban Selvaraj, Luc Claesen:
Poster: A Software-Defined Multi-Camera Network. MobiSys (Companion Volume) 2016: 129 - [c55]Yufeng Lu, Xiaohua Luo, Yimu Wang, Luc Claesen:
Line buffer reduction for LUT-based real-time image inverse warping. NEWCAS 2016: 1-4 - [c54]Yanzhe Li, Kai Huang, Luc Claesen:
SoC oriented real-time high-quality stereo vision system. VLSI-SoC 2016: 1-6 - [c53]Yanzhe Li, Kai Huang, Luc Claesen:
A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA. VLSI-SoC (Selected Papers) 2016: 213-232 - 2015
- [c52]Bart Stukken, Yimu Wang, Yu Bao, Caikou Chen, Luc Claesen:
Comparison of Predictive-Corrective Video Coding Filters for Real-Time FPGA-based Lossless Compression in Multi-Camera Systems. FPGAworld 2015: 33-39 - [c51]Yu Bao, Bart Stukken, Jef Stals, Caikou Chen, Luc Claesen:
Quantitative comparison of lossless video compression for multi-camera stereo and view interpolation applications. NEWCAS 2015: 1-4 - [c50]Wout Swinkels, Yi Sun, Bart Stukken, Constantinus Politis, Luc Claesen:
Cloud-based orthognathic surgical planning platform. NEWCAS 2015: 1-4 - [e3]Luc Claesen, María Teresa Sanz-Pascual, Ricardo Reis, Arturo Sarmiento-Reyes:
VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Playa del Carmen, Mexico, October 6-8, 2014, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 464, Springer 2015, ISBN 978-3-319-25278-0 [contents] - 2014
- [c49]Yimu Wang, Luc Claesen:
A spatiotemporal dithering method to extend color depth in multi-display system. ICSAI 2014: 896-900 - [c48]Zhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan:
SoC processor for real-time object labeling in life camera streams with low line level latency. ISCAS 2014: 345-348 - 2013
- [c47]Yimu Wang, Alexander Peyls, Yun Pan, Luc Claesen, Xiaolang Yan:
A Fast Self-Organizing Map Algorithm for Handwritten Digit Recognition. MUE 2013: 177-183 - 2012
- [c46]Andy Motten, Luc Claesen, Yun Pan:
Adaptive memory architecture for real-time image warping. ICCD 2012: 466-471 - [c45]Andy Motten, Luc Claesen, Yun Pan:
Trinocular Stereo Vision Using a Multi Level Hierarchical Classification Structure. VLSI-SoC (Selected Papers) 2012: 45-63 - [c44]Andy Motten, Luc Claesen, Yun Pan:
Trinocular disparity processor using a hierarchic classification structure. VLSI-SoC 2012: 247-250 - 2011
- [c43]Andy Motten, Luc Claesen, Yun Pan:
Binary confidence evaluation for a stereo vision based depth field processor SoC. ACPR 2011: 456-460 - 2010
- [c42]Domien Nowicki, Luc Claesen:
SoC architecture for real-time interactive painting based on lattice-Boltzmann. ICECS 2010: 235-238 - [c41]Andy Motten, Luc Claesen:
An on-chip parallel memory architecture for a stereo vision system. ICECS 2010: 495-498 - [c40]Andy Motten, Luc Claesen:
A binary adaptable window SoC architecture for a stereo vision based depth field processor. VLSI-SoC 2010: 25-30 - [c39]Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Domien Nowicki, Tom De Weyer, Frank Van Reeth, Eddy Flerackers:
Smart camera SoC system for interactive real-time real-brush based digital painting systems. VLSI-SoC 2010: 247-252 - [c38]Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Fabian Di Fiore, Frank Van Reeth, Jing Liao, Jinhui Yu:
Smart Camera System-on-Chip Architecture for Real-Time Brush Based Interactive Painting Systems. VLSI-SoC (Selected Papers) 2010: 339-353
2000 – 2009
- 2009
- [c37]Peter Vandoren, Luc Claesen, Tom Van Laerhoven, Johannes Taelman, Chris Raymaekers, Eddy Flerackers, Frank Van Reeth:
FluidPaint: an interactive digital painting system using real wet brushes. ITS 2009: 53-56 - 2008
- [c36]Peter Vandoren, Tom Van Laerhoven, Luc Claesen, Johannes Taelman, Fabian Di Fiore, Frank Van Reeth, Eddy Flerackers:
Dip - it: digital infrared painting on an interactive table. CHI Extended Abstracts 2008: 2901-2906 - [c35]Peter Vandoren, Tom Van Laerhoven, Luc Claesen, Johannes Taelman, Chris Raymaekers, Frank Van Reeth:
IntuPaint: Bridging the gap between physical and digital painting. Tabletop 2008: 65-72
1990 – 1999
- 1999
- [c34]Stefan Hendricx, Luc J. M. Claesen:
Verification of Finite-State-Machine Refinements Using a Symbolic Methodology. CHARME 1999: 326-329 - [c33]Stefan Hendricx, Luc J. M. Claesen:
Formally Verified Redundancy Removal. DATE 1999: 150- - [c32]Stefan Hendricx, Luc J. M. Claesen:
Symbolic Multi-Level Verification of Refinement. Great Lakes Symposium on VLSI 1999: 288-291 - 1998
- [j11]Ronny Martens, Luc J. M. Claesen:
Incorporating local consistency information into the online signature verification process. Int. J. Document Anal. Recognit. 1(2): 110-115 (1998) - 1997
- [c31]Ronny Martens, Luc J. M. Claesen:
An Evaluation of Different Handwriting Observation Techniques from a Signature Verification Point of View. BSDIA 1997: 273-282 - [c30]Stefan Hendricx, Luc J. M. Claesen:
A symbolic core approach to the formal verification of integrated mixed-mode applications. ED&TC 1997: 432-436 - [c29]Ronny Martens, Luc J. M. Claesen:
Dynamic Programming Optimisation for On-line Signature Verificatio. ICDAR 1997: 653-656 - [c28]Ronny Martens, Luc J. M. Claesen:
On-line Signature Verification: Discrimination Emphasised. ICDAR 1997: 657-660 - 1996
- [c27]Olivier Thiry, Luc J. M. Claesen:
A formal verification technique for embedded software. ICCD 1996: 352-357 - [c26]Ronny Martens, Luc J. M. Claesen:
On-line signature verification by dynamic time-warping. ICPR 1996: 38-42 - 1995
- [j10]Luc J. M. Claesen:
ED&TC 1995: Simulation versus formal verification. IEEE Des. Test Comput. 12(2): 82- (1995) - 1994
- [j9]Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU. Formal Methods Syst. Des. 4(1): 5-31 (1994) - [j8]Catia M. Angelo, Luc J. M. Claesen, Hugo De Man:
Modeling Multi-rate DSP Specification Semantics for Formal Transformational Design in HOL. Formal Methods Syst. Des. 5(1/2): 61-94 (1994) - [c25]Mark Genoe, Luc J. M. Claesen, Hugo De Man:
A Parallel Method for Functional Verification of Medium and High Throughput DSP Synthesis. ICCD 1994: 460-463 - [c24]Catia M. Angelo, Luc J. M. Claesen, Hugo De Man:
Reasoning About a Class of Linear Systems of Equations in HOL. TPHOLs 1994: 33-48 - 1993
- [j7]Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification. Formal Methods Syst. Des. 2(1): 45-72 (1993) - [c23]Peter De Vijt, Luc J. M. Claesen, Hugo De Man:
An Architecture for Ray - Bezier Patch Intersection. Workshop on Graphics Hardware 1993: 93-112 - [c22]Luc J. M. Claesen, Joan Daemen, Mark Genoe, G. Peeters:
Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip. ICCD 1993: 610-613 - [c21]Catia M. Angelo, Luc J. M. Claesen, Hugo De Man:
Degrees of Formality in Shallow Embedding Hardware Description Languages in HOL. HUG 1993: 89-100 - [e2]David Agnew, Luc J. M. Claesen, Raul Camposano:
Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL '93, sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993. IFIP Transactions A-32, North-Holland 1993, ISBN 0-444-81641-0 [contents] - [e1]Luc J. M. Claesen, Michael J. C. Gordon:
Higher Order Logic Theorem Proving and its Applications, Proceedings of the IFIP TC10/WG10.2 Workshop HOL'92, Leuven, Belgium, 21-24 September 1992. IFIP Transactions A-20, North-Holland/Elsevier 1993, ISBN 0-444-89880-8 [contents] - 1992
- [c20]Peter De Vijt, Luc J. M. Claesen, Hugo De Man:
ASICs for a High Performance IVIulti Processor Systemfor Photo-realistic Image Synthesis. Eurographics Workshop on Graphics Hardware 1992: 44-52 - [c19]P. Johannes, Luc J. M. Claesen, Hugo De Man:
On the use of hierarchy in timing verification with statically sensitizable paths. Great Lakes Symposium on VLSI 1992: 4-8 - [c18]P. Johannes, Luc J. M. Claesen, Hugo De Man:
Performance Through Hierarchy in Static Timing Verification. IFIP Congress (1) 1992: 703-709 - [c17]Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU. Designing Correct Circuits 1992: 173-192 - [c16]Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man:
A Description Methodology for Parameterized Modules in the Boyer-Moore Logic. TPCD 1992: 37-57 - [c15]Catia M. Angelo, Luc J. M. Claesen, Hugo De Man:
The Formal Semantics Definition of a Multi-Rate DSP Specification Language in HOL. TPHOLs 1992: 375-394 - 1991
- [c14]Mark Genoe, Luc J. M. Claesen, Eric Verlind, Frank Proesmans, Hugo De Man:
Illustration of the SFG-Tracing Multi-Level Behavioral Verification Methodology, by the Correctness Proof of a High to Low Level Synthesis Application in CATHEDRAL-II. ICCD 1991: 338-341 - [c13]Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis. TPHOLs 1991: 340-347 - [c12]W. Ploegaerts, Luc J. M. Claesen, Hugo De Man:
Defining Recursive Functions in HOL. TPHOLs 1991: 358-366 - 1990
- [j6]Patrick Odent, Luc J. M. Claesen, Hugo De Man:
Acceleration of relaxation-based circuit simulation using a multiprocessor system. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(10): 1063-1072 (1990) - [j5]Jacques Benkoski, E. Vanden Meersch, Luc J. M. Claesen, Hugo De Man:
Timing verification using statically sensitizable paths. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(10): 10723-10784 (1990) - [c11]Diederik Verkest, Luc J. M. Claesen, Hugo De Man:
Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment. EURO-DAC 1990: 62-66 - [c10]Patrick Odent, Luc J. M. Claesen, Hugo De Man:
A combined waveform relaxation: waveform relaxation newton algorithm for efficient parallel circuit simulation. EURO-DAC 1990: 244-248 - [c9]J. P. Schupp, Johan Cockx, Luc J. M. Claesen, Hugo De Man:
SPI: an open interface integrating highly interactive electronic CAD tools. EURO-DAC 1990: 492-495 - [c8]P. Johannes, P. Das, Luc J. M. Claesen, Hugo De Man:
SLOCOP-II: a versatile timing verification system for MOSVLSI. EURO-DAC 1990: 518-523 - [c7]W. De Rammelaere, Ivo Bolsens, Luc J. M. Claesen, Hugo De Man:
Derivation of signal flow direction in MOS VLSI: an alternative. ICCD 1990: 206-209
1980 – 1989
- 1989
- [j4]Luc J. M. Claesen, J. P. Schupp, P. Das, P. Johannes, S. Perremans, Hugo De Man:
Efficient false path elimination algorithms for timing verification by event graph preprocessing. Integr. 8(2): 173-187 (1989) - [j3]Luc Claesen, R. T. Boute, J. De Man, W. Ploegaerts, M. Seutter, J. Vanslembrouck, Diederik Verkest:
Application of system semantics to VLSI for the transformational design of a parameterized booth multiplier module - a case study. Microprocessing and Microprogramming 27(1-5): 261-266 (1989) - [j2]W. Ploegaerts, Diederik Verkest, Luc Claesen, Hugo De Man:
Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language. Microprocessing and Microprogramming 27(1-5): 279-286 (1989) - [c6]Patrick Odent, Luc J. M. Claesen, Hugo De Man:
Feedback Loops and Large Subcircuits in the Multiprocessor Implementation of a Relaxation Based Circuit Simulator. DAC 1989: 25-30 - [c5]Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man:
Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. DAC 1989: 513-518 - [c4]S. Perremans, Luc J. M. Claesen, Hugo De Man:
Static Timing Analysis of Dynamically Sensitizable Paths. DAC 1989: 568-573 - [c3]P. Lammens, Luc J. M. Claesen, Hugo De Man:
Correctness verification of VLSI modules supported by a very efficient Boolean prover. ICCD 1989: 266-269 - 1986
- [j1]Hugo De Man, Jan M. Rabaey, Paul Six, Luc J. M. Claesen:
Cathedral-II: A Silicon Compiler for Digital Signal Processing. IEEE Des. Test 3(6): 13-25 (1986) - [c2]Paul Six, Luc J. M. Claesen, Jan M. Rabaey, Hugo De Man:
An intelligent module generator environment. DAC 1986: 730-735 - 1985
- [c1]Rajeev Jain, Gert Goossens, Luc J. M. Claesen, Joos Vandewalle, Hugo De Man, L. Gazsi, Alfred Fettweis:
CAD Tools for the optimized design of custom VLSI wave digital filters. ICASSP 1985: 1465-1468
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-23 21:23 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
