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ORCIDXiaowen Jiang 0001
Person information
- affiliation: Zhejiang University, Institute of VLSI Design, Hangzhou, China
Other persons with the same name
- Xiaowen Jiang (aka: Xiao-Wen Jiang) — disambiguation page
- Xiaowen Jiang 0002
![[0000-0002-3588-0357]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-3588-0357")
— Southeast University, School of Mechanical Engineering, Nanjing, China - Xiaowen Jiang 0003 — CISPA Helmholtz Center for Information Security, Saarbrücken, Germany (and 1 more)
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2020 – today
- 2024
[j16]Baokui Zhu, Xiaowen Jiang, Kai Huang, Miao Yu:
A Response-Feedback-Based Strong PUF with Improved Strict Avalanche Criterion and Reliability. Sensors 24(1): 93 (2024)- 2023
- [j15]Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan:
Structured Term Pruning for Computational Efficient Neural Networks Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 190-203 (2023) - [j14]Haitian Jiang, Dongliang Xiong, Xiaowen Jiang, Li Ding, Liang Chen, Kai Huang:
Efficient Halftoning via Deep Reinforcement Learning. IEEE Trans. Image Process. 32: 5494-5508 (2023) - [j13]Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Xiaowen Jiang, Xiaolang Yan, Luc Claesen, Dehong Liu, Junjian Chen, Zhili Liu:
Structured Dynamic Precision for Deep Neural Networks Quantization. ACM Trans. Design Autom. Electr. Syst. 28(1): 12:1-12:24 (2023) - [i2]Haitian Jiang, Dongliang Xiong, Xiaowen Jiang, Li Ding, Liang Chen, Kai Huang:
Efficient Halftoning via Deep Reinforcement Learning. CoRR abs/2304.12152 (2023) - 2022
- [j12]Bowen Li, Dongliang Xiong, Kai Huang, Xiaowen Jiang, Hao Yao, Junjian Chen, Luc Claesen:
Sample-wise dynamic precision quantization for neural network acceleration. IEICE Electron. Express 19(16): 20220229 (2022) - [j11]Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong:
Structured precision skipping: Accelerating convolutional neural networks with budget-aware dynamic precision selection. J. Syst. Archit. 124: 102403 (2022) - [j10]Xiaowen Jiang, Tianyi Sha, Dehong Liu, Junjian Chen, Chen Chen, Kai Huang:
Flexible and Dynamic Scheduling of Mixed-Criticality Systems. Sensors 22(19): 7528 (2022) - [j9]Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong:
Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(6): 1902-1915 (2022) - [c2]Haitian Jiang, Dongliang Xiong, Xiaowen Jiang, Aiguo Yin, Li Ding, Kai Huang:
Halftoning with Multi-Agent Deep Reinforcement Learning. ICIP 2022: 641-645 - [i1]Haitian Jiang, Dongliang Xiong, Xiaowen Jiang, Aiguo Yin, Li Ding, Kai Huang:
Halftoning with Multi-Agent Deep Reinforcement Learning. CoRR abs/2207.11408 (2022) - 2021
- [j8]Kai Huang, Ke Wang, Dan-dan Zheng, Xiaowen Jiang, Xiaomeng Zhang, Rongjie Yan, Xiaolang Yan:
Expected Energy Optimization for Real-Time Multiprocessor SoCs Running Periodic Tasks with Uncertain Execution Time. IEEE Trans. Sustain. Comput. 6(3): 398-411 (2021) - 2020
- [c1]Dongliang Xiong, Kai Huang, Haitian Jiang, Bowen Li, Siang Chen, Xiaowen Jiang:
IdleSR: Efficient Super-Resolution Network with Multi-scale IdleBlocks. ECCV Workshops (3) 2020: 136-151
2010 – 2019
- 2019
- [j7]Kai Huang, Xiaowen Jiang, Haitian Jiang, Xiaomeng Zhang, Min Yu, Rongjie Yan, Xiaolang Yan:
Fine-Grained Communication-Aware Task Scheduling Approach for Acyclic and Cyclic Applications on MPSoCs. IEEE Access 7: 54372-54389 (2019) - [j6]Kai Huang, Yun He, Xiaowen Jiang:
Holistic hardware Trojan design of trigger and payload at gate level with rare switching signals eliminated. IEICE Electron. Express 16(17): 20190431 (2019) - [j5]Kai Huang, Xiaomeng Zhang, Dan-dan Zheng, Min Yu, Xiaowen Jiang, Xiaolang Yan, Lisane B. de Brisolara, Ahmed Amine Jerraya:
A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1744-1757 (2019) - 2018
- [j4]Xiaomeng Zhang, Kai Huang, Min Yu, Xiaowen Jiang, Xiaolang Yan:
BFCO: A BPSO-Based Fine-Grained Communication Optimization Method for MPSoC. IEEE Access 6: 18771-18785 (2018) - [j3]Kai Huang, Xiaowen Jiang, Xiaomeng Zhang, Rongjie Yan, Ke Wang, Dongliang Xiong, Xiaolang Yan:
Energy-Efficient Fault-Tolerant Mapping and Scheduling on Heterogeneous Multiprocessor Real-Time Systems. IEEE Access 6: 57614-57630 (2018) - 2017
- [j2]Dongliang Xiong, Kai Huang, Xiaowen Jiang, Xiaolang Yan:
Providing Predictable Performance via a Slowdown Estimation Model. ACM Trans. Archit. Code Optim. 14(3): 25:1-25:26 (2017) - 2016
- [j1]Dongliang Xiong, Kai Huang, Xiaowen Jiang, Xiaolang Yan:
Memory Access Scheduling Based on Dynamic Multilevel Priority in Shared DRAM Systems. ACM Trans. Archit. Code Optim. 13(4): 42:1-42:26 (2016)
Coauthor Index
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