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Ippei Akita
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2020 – today
- 2024
- [c11]Ippei Akita, Shunichi Tatematsu:
3.5 A 4mW 45pT/√Hz Magnetoimpedance-Based ΔΣ Magnetometer with Background Gain Calibration and Short-Time CDS Techniques. ISSCC 2024: 62-64 - 2023
- [j13]Hiroshi Fuketa, Ippei Akita, Tomohiro Ishikawa, Hanpei Koike, Takahiro Mori:
A Cryogenic CMOS Current Integrator and Correlation Double Sampling Circuit for Spin Qubit Readout. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5220-5228 (2023) - 2022
- [j12]Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki:
An Automatic Loop Gain Enhancement Technique in Magnetoimpedance-Based Magnetometer. IEEE J. Solid State Circuits 57(12): 3704-3715 (2022) - [c10]Ippei Akita, Takeshi Kawano, Hitoshi Aoyama, Shunichi Tatematsu, Masakazu Hioki:
A 2.6mW 10pTI √ Hz 33kHz Magnetoimpedance-Based Magnetometer with Automatic Loop-Gain and Bandwidth Enhancement. ISSCC 2022: 1-3 - [c9]Hiroshi Fuketa, Ippei Akita, Tomohiro Ishikawa, Hanpei Koike, Takahiro Mori:
A Cryogenic CMOS Current Comparator for Spin Qubit Readout Achieving Fast Readout Time and High Current Resolution. VLSI Technology and Circuits 2022: 234-235 - 2020
- [j11]Ippei Akita, Takayuki Okazawa, Yoshihiko Kurui, Akira Fujimoto, Takashi Asano:
A Feedforward Noise Reduction Technique in Capacitive MEMS Accelerometer Analog Front-End for Ultra-Low-Power IoT Applications. IEEE J. Solid State Circuits 55(6): 1599-1609 (2020)
2010 – 2019
- 2019
- [j10]Dejan Rozgic, Vahagn Hokhikyan, Wenlong Jiang, Ippei Akita, Sina Basir-Kazeruni, Hariprasad Chandrakumar, Dejan Markovic:
A 0.338 cm3, Artifact-Free, 64-Contact Neuromodulation Platform for Simultaneous Stimulation and Sensing. IEEE Trans. Biomed. Circuits Syst. 13(1): 38-55 (2019) - [c8]Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto:
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment. A-SSCC 2019: 267-270 - 2018
- [j9]Takayuki Okazawa, Ippei Akita:
A Dynamic Latched Comparator Using Area-Efficient Stochastic Offset Voltage Detection Technique. IEICE Trans. Electron. 101-C(5): 396-403 (2018) - [j8]Takayuki Okazawa, Ippei Akita:
A Time-Domain Analog Spatial Compressed Sensing Encoder for Multi-Channel Neural Recording. Sensors 18(1): 184 (2018) - [c7]Ippei Akita, Takayuki Okazawa, Yoshihiko Kurui, Akira Fujimoto, Takashi Asano:
A 181NW 970µG✓HZ Accelerometer Analog Front-End Employing Feedforward Noise Reduction Technique. VLSI Circuits 2018: 161-162 - 2017
- [c6]Takayuki Okazawa, Ippei Akita:
A robust and low-power synchronization technique of coarse-and-fine conversion parts in ring-oscillator-based time-to-digital converters. ICECS 2017: 239-242 - 2015
- [j7]Ippei Akita, Makoto Ishida:
A current noise reduction technique in chopper instrumentation amplifier for high-impedance sensors. IEICE Electron. Express 12(11): 20150374 (2015) - [j6]Kenji Okabe, Horagodage Prabhath Jeewan, Shota Yamagiwa, Takeshi Kawano, Makoto Ishida, Ippei Akita:
Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems. Sensors 15(12): 31821-31832 (2015) - 2013
- [j5]Masanori Furuta, Ippei Akita, Junya Matsuno, Tetsuro Itakura:
A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(7): 1552-1561 (2013) - [c5]Ippei Akita, Makoto Ishida:
A 0.06mm2 14nV/√Hz chopper instrumentation amplifier with automatic differential-pair matching. ISSCC 2013: 178-179 - 2011
- [j4]Ippei Akita, Tetsuro Itakura, Kei Shiraishi:
Current-Steering Digital-to-Analog Converter With a High-PSRR Current Switch. IEEE Trans. Circuits Syst. II Express Briefs 58-II(11): 724-728 (2011) - [c4]Ippei Akita, Masanori Furuta, Junya Matsuno, Tetsuro Itakura:
A 7-bit 1.5-GS/s time-interleaved SAR ADC with dynamic track-and-hold amplifier. A-SSCC 2011: 293-296 - [c3]Ippei Akita, Yuta Tsubouchi, Tetsuro Itakura, Michihiko Nishigaki, Hiroshi Uemura, Hideto Furuyama, Hideki Shibata:
A 6Gbps 3mW optical receiver with DCOC-combined ATC in 65nm CMOS. ESSCIRC 2011: 343-346
2000 – 2009
- 2009
- [j3]Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro:
A 0.6-V Dynamic Biasing Filter With 89-dB Dynamic Range in 0.18-µm CMOS. IEEE J. Solid State Circuits 44(10): 2790-2799 (2009) - 2008
- [j2]Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro:
A 0.8-V Syllabic-Companding Log Domain Filter with 78-dB Dynamic Range in 0.35-µm CMOS. IEICE Trans. Electron. 91-C(1): 87-95 (2008) - 2007
- [j1]Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro:
Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(2): 339-350 (2007) - [c2]Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro:
Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter. ISCAS 2007: 2244-2247 - 2006
- [c1]Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro:
Low-voltage CMOS syllabic-companding log domain filter. ISCAS 2006
Coauthor Index
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