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2020 – today
- 2024
[c19]Hiroaki Kitaike, Hironori Tagawa, Masaya Kaneko, Jin Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hiroki Wakatsuchi, Kyoya Takano, Hirofumi Shinohara, Kiichi Niitsu:
A 0.00027 mm2 1.2V 0.089pJ/bit 10Gbps 41.6 GHz Standard-Cell-Based Passive-Less Wireless OOK Transmitter with On-Chip Antenna in 12nm FinFET. NorCAS 2024: 1-6- [c18]Shinsuke Hara, Mohamed H. Mubarak, Akifumi Kasamatsu, Yoshiki Sugimoto, Kunio Sakakibara
, Kyoya Takano, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
25.9-Gb/s 259-GHz Phased-Array CMOS Receiver Module with 28° Steering Range. RWS 2024: 1-4 - 2023
- [j21]Sangyeop Lee, Kyoya Takano, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima:
A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC. IEICE Trans. Electron. 106(10): 533-537 (2023) - [j20]Keisuke Kawahara, Yohtaro Umeda, Kyoya Takano, Shinsuke Hara:
A Compact Fully-Differential Distributed Amplifier with Coupled Inductors in 0.18-µm CMOS Technology. IEICE Trans. Electron. 106(11): 669-676 (2023) - [j19]Keisuke Kawahara, Yohtaro Umeda, Kyoya Takano, Shinsuke Hara:
A 0.0058-mm2 Inductor-Less CMOS Active Balun With Gain and Phase Errors Within -0.1 ± 0.2 dB and -0.18 ± 1.17° From DC to 8 GHz. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2317-2330 (2023) - [c17]Takeshi Yoshida, Shinsuke Hara, Tatsuo Hagino, Mohamed H. Mubarak, Akifumi Kasamatsu, Kyoya Takano, Yoshiki Sugimoto, Kunio Sakakibara, Shuhei Amakawa, Minoru Fujishima:
A 2D Beam-Steerable 252-285-GHz 25.8-Gbit/s CMOS Receiver Module. A-SSCC 2023: 1-3 - [c16]Sho Okii, Shinsuke Hara, Akifumi Kasamatsu, Yohtaro Umeda, Kyoya Takano:
39 - 67 GHz CMOS Multistage Power Amplifier With Two-Way Power Stage. ICICDT 2023: 61-63 - 2022
- [j18]Shinsuke Hara, Ruibing Dong, Sangyeop Lee, Kyoya Takano, Naoya Toshida, Akifumi Kasamatsu, Kunio Sakakibara, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
A 76-Gbit/s 265-GHz CMOS Receiver With WR-3.4 Waveguide Interface. IEEE J. Solid State Circuits 57(10): 2988-2998 (2022) - [c15]Keisuke Kawahara, Joe Sawada, Takumi Kamo, Yohtaro Umeda, Kyoya Takano:
A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler. RWS 2022: 125-127 - 2021
- [j17]Yohei Morishita, Sangyeop Lee, Toshihiro Teraoka, Ruibing Dong, Yuichi Kashino, Hitoshi Asano, Shinsuke Hara, Kyoya Takano, Kosuke Katayama, Takenori Sakamoto, Naganori Shirakata, Koji Takinami, Kazuaki Takahashi, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
300-GHz-Band OFDM Video Transmission with CMOS TX/RX Modules and 40dBi Cassegrain Antenna toward 6G. IEICE Trans. Electron. 104-C(10): 576-586 (2021) - [c14]Shinsuke Hara, Ruibing Dong, Sangyeop Lee, Kyoya Takano, Naoya Toshida, Satoru Tanoi, Tatsuo Hagino, Mohamed H. Mubarak, Norihiko Sekine, Issei Watanabe, Akifumi Kasamatsu, Kunio Sakakibara, Shunichi Kubo, Satoshi Miura, Yohtaro Umeda, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
A 76-Gbit/s 265-GHz CMOS Receiver. A-SSCC 2021: 1-3 - [c13]Sangyeop Lee, Shinsuke Hara, Ruibing Dong, Kyoya Takano, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima:
A 272-GHz CMOS Analog BPSK/QPSK Demodulator for IEEE 802.15.3d. ESSCIRC 2021: 415-418 - [c12]Ryo Kabeya, Yohtaro Umeda, Kyoya Takano:
Frequency-Interleaved ADC with RF Equivalent Ideal Filter for Broadband Optical Communication Receivers. ICECS 2021: 1-5 - [c11]Yusuke Yokoi, Yusuke Takai, Joe Sawada, Takumi Kamo, Yohtaro Umeda, Kyoya Takano:
DAC Bandwidth Tripler with 3: 1 Image-Rejection Analog Multiplexer. ICECS 2021: 1-6 - [c10]Keisuke Kawahara, Yohtaro Umeda, Kyoya Takano:
Design of an Area-Efficient Differential Distributed Amplifier Based on the Theory of Differential Transmission Lines. ISCAS 2021: 1-5 - [c9]Keisuke Kawahara, Yohtaro Umeda, Kyoya Takano:
A Broadband Active Balun with Inductor-Less Active Peaking and Imbalance Correction. MWSCAS 2021: 749-752
2010 – 2019
- 2018
- [j16]Shinsuke Hara, Kosuke Katayama, Kyoya Takano, Ruibing Dong, Issei Watanabe, Norihiko Sekine, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
32-Gbit/s CMOS Receivers in 300-GHz Band. IEICE Trans. Electron. 101-C(7): 464-471 (2018) - [c8]Sangyeop Lee, Kyoya Takano, Ruibing Dong, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima:
A 37-GHz-Input Divide-by-36 Injection-Locked Frequency Divider with 1.6-GHz Lock Range. A-SSCC 2018: 219-222 - [c7]Yuto Tanaka, Yohtaro Umeda, Kyoya Takano:
Power-amplifier-inserted Transversal Filter that Recovers Quantization Noise Power by CMOS Rectifier. ICECS 2018: 653-654 - [c6]Kyoya Takano, Kosuke Katayama, Shinsuke Hara, Ruibing Dong, Koichi Mizuno, Kazuaki Takahashi, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
300-GHz CMOS transmitter module with built-in waveguide transition on a multilayered glass epoxy PCB. RWS 2018: 154-156 - 2017
- [c5]Kyoya Takano, Shuhei Amakawa, Kosuke Katayama, Shinsuke Hara, Ruibing Dong, Akifumi Kasamatsu, Iwao Hosako, Koichi Mizuno, Kazuaki Takahashi, Takeshi Yoshida, Minoru Fujishima:
17.9 A 105Gb/s 300GHz CMOS transmitter. ISSCC 2017: 308-309 - 2016
- [j15]Shinsuke Hara, Kosuke Katayama, Kyoya Takano, Issei Watanabe, Norihiko Sekine, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
Compact 141-GHz Differential Amplifier with 20-dB Peak Gain and 22-GHz 3-dB Bandwidth. IEICE Trans. Electron. 99-C(10): 1156-1163 (2016) - [j14]Kosuke Katayama, Kyoya Takano, Shuhei Amakawa, Shinsuke Hara, Akifumi Kasamatsu, Koichi Mizuno, Kazuaki Takahashi, Takeshi Yoshida, Minoru Fujishima:
A 300 GHz CMOS Transmitter With 32-QAM 17.5 Gb/s/ch Capability Over Six Channels. IEEE J. Solid State Circuits 51(12): 3037-3048 (2016) - [c4]Kosuke Katayama, Kyoya Takano, Shuhei Amakawa, Shinsuke Hara, Akifumi Kasamatsu, Koichi Mizuno, Kazuaki Takahashi, Takeshi Yoshida, Minoru Fujishima:
20.1 A 300GHz 40nm CMOS transmitter with 32-QAM 17.5Gb/s/ch capability over 6 channels. ISSCC 2016: 342-343 - 2015
- [j13]Minoru Fujishima, Shuhei Amakawa, Kyoya Takano, Kosuke Katayama, Takeshi Yoshida:
Tehrahertz CMOS Design for Low-Power and High-Speed Wireless Communication. IEICE Trans. Electron. 98-C(12): 1091-1104 (2015) - [c3]Kyoya Takano, Kosuke Katayama, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima:
124-GHz CMOS quadrature voltage-controlled oscillator with fundamental injection locking. A-SSCC 2015: 1-4 - 2014
- [j12]Mizuki Motoyoshi, Naoko Ono, Kosuke Katayama, Kyoya Takano, Minoru Fujishima:
135GHz 98mW 10Gbps CMOS Amplitude Shift Keying Transmitter and Receiver Chipset. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(1): 86-93 (2014) - [j11]Kosuke Katayama, Mizuki Motoyoshi, Kyoya Takano, Chen Yang Li, Shuhei Amakawa, Minoru Fujishima:
E-Band 65nm CMOS Low-Noise Amplifier Design Using Gain-Boost Technique. IEICE Trans. Electron. 97-C(6): 476-485 (2014) - 2013
- [j10]Ryuichi Fujimoto, Mizuki Motoyoshi, Kyoya Takano, Minoru Fujishima:
A 120 GHz/140 GHz Dual-Channel OOK Receiver Using 65 nm CMOS Technology. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(2): 486-493 (2013) - [j9]Kyoya Takano, Shuhei Amakawa, Kosuke Katayama, Mizuki Motoyoshi, Minoru Fujishima:
Modeling of Short-Millimeter-Wave CMOS Transmission Line with Lossy Dielectrics with Specific Absorption Spectrum. IEICE Trans. Electron. 96-C(10): 1311-1318 (2013) - [j8]Minoru Fujishima, Mizuki Motoyoshi, Kosuke Katayama, Kyoya Takano, Naoko Ono, Ryuichi Fujimoto:
98 mW 10 Gbps Wireless Transceiver Chipset With D-Band CMOS Circuits. IEEE J. Solid State Circuits 48(10): 2273-2284 (2013) - [c2]Kyoya Takano, Ryuichi Fujimoto, Mizuki Motoyoshi, Kosuke Katayama, Minoru Fujishima:
14.4mW 10Gbps CMOS limiting amplifier with local DC offset cancellers. RWS 2013: 235-237 - 2012
- [j7]Kosuke Katayama, Mizuki Motoyoshi, Kyoya Takano, Ryuichi Fujimoto, Minoru Fujishima:
Bias-Voltage-Dependent Subcircuit Model for Millimeter-Wave CMOS Circuit. IEICE Trans. Electron. 95-C(6): 1077-1085 (2012) - [j6]Ryuichi Fujimoto, Mizuki Motoyoshi, Kyoya Takano, Uroschanit Yodprasit, Minoru Fujishima:
A 120-GHz Transmitter and Receiver Chipset with 9-Gbps Data Rate Using 65-nm CMOS Technology. IEICE Trans. Electron. 95-C(7): 1154-1162 (2012) - [c1]Naoko Ono, Mizuki Motoyoshi, Kyoya Takano, Kosuke Katayama, Ryuichi Fujimoto, Minoru Fujishima:
135 GHz 98 mW 10 Gbps ASK transmitter and receiver chipset in 40 nm CMOS. VLSIC 2012: 50-51 - 2011
- [j5]Mizuki Motoyoshi, Ryuichi Fujimoto, Kyoya Takano, Minoru Fujishima:
140GHz CMOS amplifier with group delay variation of 10.2ps and 0.1dB bandwidth of 12GHz. IEICE Electron. Express 8(14): 1192-1197 (2011) - [j4]Ryuichi Fujimoto, Kyoya Takano, Mizuki Motoyoshi, Uroschanit Yodprasit, Minoru Fujishima:
Device Modeling Techniques for High-Frequency Circuits Design Using Bond-Based Design at over 100 GHz. IEICE Trans. Electron. 94-C(4): 589-597 (2011) - [j3]Kyoya Takano, Ryuichi Fujimoto, Kosuke Katayama, Mizuki Motoyoshi, Minoru Fujishima:
Analysis of De-Embedding Error Cancellation in Cascade Circuit Design. IEICE Trans. Electron. 94-C(10): 1641-1649 (2011)
2000 – 2009
- 2008
- [j2]Kyoya Takano, Mizuki Motoyoshi, Minoru Fujishima:
4.8 GHz CMOS Frequency Multiplier Using Subharmonic Pulse-Injection Locking for Spurious Suppression. IEICE Trans. Electron. 91-C(11): 1738-1743 (2008) - 2007
- [j1]Koji Ishibashi, Ivan Chee Hong Lai, Kyoya Takano, Minoru Fujishima:
A Scalable Model of Shielded Capacitors Using Mirror Image Effects. IEICE Trans. Electron. 90-C(12): 2237-2244 (2007)
Coauthor Index
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last updated on 2024-11-27 21:24 CET by the dblp team
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