"A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler."

Keisuke Kawahara et al. (2022)

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DOI: 10.1109/RWS53089.2022.9719979

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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Keisuke Kawahara, Joe Sawada, Takumi Kamo, Yohtaro Umeda, Kyoya Takano:
A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler. RWS 2022: 125-127

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