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ORCIDJitesh H. Panchal
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2020 – today
- 2024
[j37]Karim A. ElSayed, Jitesh H. Panchal:
Information Embedding in Additively Manufactured Parts Through Printing Speed Control. J. Comput. Inf. Sci. Eng. 24(7) (2024)- [i9]Can Cui, Yunsheng Ma, Zichong Yang, Yupeng Zhou, Peiran Liu, Juanwu Lu, Lingxi Li, Yaobin Chen, Jitesh H. Panchal, Amr Abdelraouf, Rohit Gupta, Kyungtae Han, Ziran Wang:
Large Language Models for Autonomous Driving (LLM4AD): Concept, Benchmark, Simulation, and Real-Vehicle Experiment. CoRR abs/2410.15281 (2024) - 2023
- [j36]Atharva Hans, Ashish M. Chaudhari, Ilias Bilionis
, Jitesh H. Panchal:
A Bayesian Hierarchical Model for Extracting Individuals' Theory-Based Causal Knowledge. J. Comput. Inf. Sci. Eng. 23(3) (2023) - [j35]Karim A. ElSayed, Adam Dachowicz, Mikhail J. Atallah, Jitesh H. Panchal:
Information Embedding for Secure Manufacturing: Challenges and Research Opportunities. J. Comput. Inf. Sci. Eng. 23(6) (2023) - 2022
- [j34]Hannah Forbes, Dirk Schaefer, Jitesh H. Panchal, Ji Han:
A Design Framework for Social Product Development. IEEE Trans. Engineering Management 69(2): 302-313 (2022) - [j33]Murtuza Shergadwala, Hannah Forbes, Dirk Schaefer, Jitesh H. Panchal:
Challenges and Research Directions in Crowdsourcing for Engineering Design: An Interview Study With Industry Professionals. IEEE Trans. Engineering Management 69(4): 1592-1604 (2022) - [c11]José I. Caiza, Ian Walter, Jitesh H. Panchal, Junjie Qin, Philip E. Paré:
Optimal Ordering Policies for Multi-Echelon Supply Networks. CDC 2022: 4539-4544 - [c10]Qian Shi, Waterloo Tsutsui, Dalia Bekdache, Jitesh H. Panchal, Daniel DeLaurentis:
A system-of-systems (SoS) perspective on additive manufacturing decisions for space applications. SoSE 2022: 282-288 - [i8]José I. Caiza, Ian Walter, Jitesh H. Panchal, Junjie Qin, Philip E. Pare:
Optimal Ordering Policies for Multi-Echelon Supply Networks. CoRR abs/2209.04789 (2022) - 2021
- [c9]Karim A. ElSayed, Adam Dachowicz, Jitesh H. Panchal:
Information Embedding in Additive Manufacturing through Printing Speed Control. AMSec@CCS 2021: 31-37 - [c8]Daniel A. DeLaurentis, Jitesh H. Panchal, Ali K. Raz, Prajwal Balasubramani, Apoorv Maheshwari, Adam Dachowicz, Kshitij Mall:
Toward Automated Game Balance: A Systematic Engineering Design Approach. CoG 2021: 1-8 - [c7]Erin Lanus, Ivan Hernandez, Adam Dachowicz, Laura J. Freeman, Melanie Grande, Andrew Lang, Jitesh H. Panchal, Anthony Patrick, Scott Welch:
Test and Evaluation Framework for Multi-Agent Systems of Autonomous Intelligent Agents. SOSE 2021: 203-209 - [i7]Erin Lanus, Ivan Hernandez, Adam Dachowicz, Laura J. Freeman, Melanie Grande, Andrew Lang, Jitesh H. Panchal, Anthony Patrick, Scott Welch:
Test and Evaluation Framework for Multi-Agent Systems of Autonomous Intelligent Agents. CoRR abs/2101.10430 (2021) - 2020
- [j32]Yandi Bao, Zhenjun Ming, Jitesh H. Panchal, Guoxin Wang, Yan Yan:
A Reusable and Executable Information Model of Experiments on Human Decision Making in Systems Engineering and Design. IEEE Access 8: 27597-27617 (2020) - [j31]Salar Safarkhani, Ilias Bilionis, Jitesh H. Panchal:
Modeling the System Acquisition Using Deep Reinforcement Learning. IEEE Access 8: 124894-124904 (2020) - [j30]Adam Dachowicz, Mikhail J. Atallah, Jitesh H. Panchal:
Extraction and Analysis of Spatial Correlation Micrograph Features for Traceability in Manufacturing. J. Comput. Inf. Sci. Eng. 20(5) (2020) - [j29]Sharmila Karumuri, Rohit Tripathy, Ilias Bilionis, Jitesh H. Panchal:
Simulator-free solution of high-dimensional stochastic elliptic partial differential equations using deep neural networks. J. Comput. Phys. 404 (2020) - [j28]Zoe Szajnfarber, Paul T. Grogan, Jitesh H. Panchal, Erica Gralla:
A call for consensus on the use of representative model worlds in systems engineering and design. Syst. Eng. 23(4): 436-442 (2020) - [j27]Salar Safarkhani, Ilias Bilionis, Jitesh H. Panchal:
Toward a Theory of Systems Engineering Processes: A Principal-Agent Model of a One-Shot, Shallow Process. IEEE Syst. J. 14(3): 3277-3288 (2020)
2010 – 2019
- 2019
- [j26]Siva Chaitanya Chaduvula, Mikhail J. Atallah, Jitesh H. Panchal:
sFEA: A Secure Finite Element Analysis Technique. J. Comput. Inf. Sci. Eng. 19(3) (2019) - [j25]Zhenghui Sha, Ashish M. Chaudhari, Jitesh H. Panchal:
Modeling Participation Behaviors in Design Crowdsourcing Using a Bipartite Network-Based Approach. J. Comput. Inf. Sci. Eng. 19(3) (2019) - [j24]Yan Wang, Jitesh H. Panchal, Mahesh Mani:
Special Issue: Highlights From ASME CIE 2018. J. Comput. Inf. Sci. Eng. 19(3) (2019) - [i6]Salar Safarkhani, Vikranth Reddy Kattakuri, Ilias Bilionis, Jitesh H. Panchal:
A Principal-Agent Model of Systems Engineering Processes with Application to Satellite Design. CoRR abs/1903.06979 (2019) - [i5]Salar Safarkhani, Ilias Bilionis, Jitesh H. Panchal:
Towards a Theory of Systems Engineering Processes: A Principal-Agent Model of a One-Shot, Shallow Process. CoRR abs/1903.12086 (2019) - [i4]Piyush Pandita, Nimish Awalgaonkar, Ilias Bilionis, Jitesh H. Panchal:
Learning Arbitrary Quantities of Interest from Expensive Black-Box Functions through Bayesian Sequential Optimal Design. CoRR abs/1912.07366 (2019) - 2018
- [j23]Adam Dachowicz, Siva Chaitanya Chaduvula, Mikhail J. Atallah, Ilias Bilionis, Jitesh H. Panchal:
Strategic information revelation in collaborative design. Adv. Eng. Informatics 36: 242-253 (2018) - [j22]Zhenjun Ming, Guoxin Wang, Yan Yan, Jitesh H. Panchal, Chung-Hyun Goh, Janet K. Allen, Farrokh Mistree:
Ontology-Based Representation of Design Decision Hierarchies. J. Comput. Inf. Sci. Eng. 18(1) (2018) - [j21]Siva Chaitanya Chaduvula, Mikhail J. Atallah, Jitesh H. Panchal:
Secure Codesign: Achieving Optimality Without Revealing. J. Comput. Inf. Sci. Eng. 18(2) (2018) - [j20]Jitesh H. Panchal:
Special Issue: Highlights From ASME Computers and Information in Engineering (CIE) 2017. J. Comput. Inf. Sci. Eng. 18(3) (2018) - [j19]Siva Chaitanya Chaduvula, Adam Dachowicz, Mikhail J. Atallah, Jitesh H. Panchal:
Security in Cyber-Enabled Design and Manufacturing: A Survey. J. Comput. Inf. Sci. Eng. 18(4) (2018) - [j18]Ahmad F. Taha, Junjian Qi, Jianhui Wang, Jitesh H. Panchal:
Risk Mitigation for Dynamic State Estimation Against Cyber Attacks and Unknown Inputs. IEEE Trans. Smart Grid 9(2): 886-899 (2018) - [i3]Piyush Pandita, Ilias Bilionis, Jitesh H. Panchal:
Deriving Information Acquisition Criteria For Sequentially Inferring The Expected Value Of A Black-Box Function. CoRR abs/1807.09979 (2018) - 2017
- [j17]Shumiao Wang, Siddharth Bhandari, Siva Chaitanya Chaduvula, Mikhail J. Atallah, Jitesh H. Panchal, Karthik Ramani:
Secure Collaboration in Engineering Systems Design. J. Comput. Inf. Sci. Eng. 17(4) (2017) - [j16]Jitesh H. Panchal, Zoe Szajnfarber:
Experiments in systems engineering and design research. Syst. Eng. 20(6): 529-541 (2017) - 2016
- [j15]Zhenjun Ming, Yan Yan, Guoxin Wang, Jitesh H. Panchal, Chung-Hyun Goh, Janet K. Allen, Farrokh Mistree:
Ontology-based executable design decision template representation and reuse. Artif. Intell. Eng. Des. Anal. Manuf. 30(4): 390-405 (2016) - [j14]Dazhong Wu, David W. Rosen, Jitesh H. Panchal, Dirk Schaefer:
Understanding Communication and Collaboration in Social Product Development Through Social Network Analysis. J. Comput. Inf. Sci. Eng. 16(1) (2016) - 2015
- [j13]Ahmad F. Taha, Ahmed Elmahdi, Jitesh H. Panchal, Dengfeng Sun:
Unknown input observer design and analysis for networked control systems. Int. J. Control 88(5): 920-934 (2015) - [i2]Ahmad F. Taha, Junjian Qi, Jianhui Wang, Jitesh H. Panchal:
Risk Mitigation for Dynamic State Estimation Against Cyber Attacks and Unknown Inputs. CoRR abs/1508.07246 (2015) - [i1]Ahmad F. Taha, Junjian Qi, Jianhui Wang, Jitesh H. Panchal:
Dynamic State Estimation under Cyber Attacks: A Comparative Study of Kalman Filters and Observers. CoRR abs/1508.07252 (2015) - 2014
- [j12]Qize Le, Zhenghui Sha, Jitesh H. Panchal:
A Generative Network Model for Product Evolution. J. Comput. Inf. Sci. Eng. 14(1) (2014) - [j11]Ahmad F. Taha, Jitesh H. Panchal:
Decision-Making in Energy Systems With Multiple Technologies and Uncertain Preferences. IEEE Trans. Syst. Man Cybern. Syst. 44(7): 894-907 (2014) - [c6]Ahmad F. Taha, Ahmed Elmahdi, Jitesh H. Panchal, Dengfeng Sun:
Stability analysis of networked control systems with unknown inputs. Allerton 2014: 936-942 - [c5]Ahmed Elmahdi, Ahmad F. Taha, Dengfeng Sun, Jitesh H. Panchal:
An optimal general purpose scheduler for Networked Control Systems. SMC 2014: 234-239 - [c4]Zhenghui Sha, Jitesh H. Panchal:
Estimating linking preferences and behaviors of autonomous systems in the Internet using a discrete choice model. SMC 2014: 1591-1597 - [c3]Ahmad F. Taha, Ahmed Elmahdi, Jitesh H. Panchal, Dengfeng Sun:
Networked unknown input observer analysis and design for time-delay systems. SMC 2014: 3278-3283 - 2013
- [j10]Jitesh H. Panchal, Surya R. Kalidindi, David L. McDowell:
Key computational modeling issues in Integrated Computational Materials Engineering. Comput. Aided Des. 45(1): 4-25 (2013) - [c2]Zhenghui Sha, Jitesh H. Panchal:
Towards the Design of Complex Evolving Networks with High Robustness and Resilience. CSER 2013: 522-531 - 2012
- [j9]Qize Le, Jitesh H. Panchal:
Building Smaller Sized Surrogate Models of Complex Bipartite Networks Based on Degree Distributions. IEEE Trans. Syst. Man Cybern. Part A 42(5): 1152-1166 (2012) - [c1]Qize Le, Jitesh H. Panchal:
Network-Based Analysis of the Structure and Evolution of an Open Source Software Product. HICSS 2012: 3436-3445 - 2011
- [j8]Qize Le, Jitesh H. Panchal:
Modeling the Effect of Product Architecture on Mass-Collaborative Processes. J. Comput. Inf. Sci. Eng. 11(1) (2011) - [j7]Hao-Yun Huang, Qize Le, Jitesh H. Panchal:
Analysis of the Structure and Evolution of an Open-Source Community. J. Comput. Inf. Sci. Eng. 11(3) (2011) - [j6]Jitesh H. Panchal, Matthias Messer:
Extracting the Structure of Design Information From Collaborative Tagging. J. Comput. Inf. Sci. Eng. 11(4) (2011)
2000 – 2009
- 2009
- [j5]Jitesh H. Panchal, Marco Gero Fernández, Christiaan J. J. Paredis, Janet K. Allen, Farrokh Mistree:
A Modular Decision-centric Approach for Reusable Design Processes. Concurr. Eng. Res. Appl. 17(1): 5-19 (2009) - [j4]Fathianathan Mervyn, Jitesh H. Panchal:
Incorporating design outsourcing decisions within the design of collaborative design processes. Comput. Ind. 60(6): 392-402 (2009) - [j3]Jitesh H. Panchal, Christiaan J. J. Paredis, Janet K. Allen, Farrokh Mistree:
Managing Design-Process Complexity: A Value-of-Information Based Approach for Scale and Decision Decoupling. J. Comput. Inf. Sci. Eng. 9(2) (2009) - [j2]Jitesh H. Panchal:
Agent-Based Modeling of Mass-Collaborative Product Development Processes. J. Comput. Inf. Sci. Eng. 9(3) (2009) - 2007
- [j1]Jitesh H. Panchal, Marco Gero Fernández, Christiaan J. J. Paredis, Janet K. Allen, Farrokh Mistree:
An Interval-based Constraint Satisfaction (IBCS) Method for Decentralized, Collaborative Multifunctional Design. Concurr. Eng. Res. Appl. 15(3): 309-323 (2007)
Coauthor Index
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last updated on 2024-11-27 21:23 CET by the dblp team
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