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2020 – today
- 2024
[c6]Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata:
On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injection. COSADE 2024: 22-37- [c5]Takuya Wadatsumi, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Lang Lin, Norman Chang, Makoto Nagata:
Modeling and Analysis of On-Chip Voltage Fluctuations Caused by Electromagnetic Fault Injection. EMC Compo 2024: 1-4 - [c4]Yusuke Hayashi, Rikuu Hasegawa, Takuya Wadatsumi, Kazuki Monta, Takuji Miki, Makoto Nagata:
Fault Injection Attacks Exploiting High Voltage Pulsing over Si-Substrate Backside of IC chips. FDTC 2024: 44-52 - [c3]Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata, Lang Lin, Akhilesh Kumar, Norman Chang:
Si-Backside Side-Channel Leakage Measurement and Simulation. ISOCC 2024: 189-190 - 2023
- [j1]Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kikuo Muramatsu, Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo, Takuji Miki
, Makoto Nagata:
Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging. IEICE Trans. Electron. 106(10): 556-564 (2023) - [c2]Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Makoto Nagata:
Characterization of Backside ESD Impacts on Integrated Circuits. IRPS 2023: 1-6 - 2022
- [c1]Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Takuji Miki, Makoto Nagata, Kikuo Muramatsu, Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo:
Voltage Surges by Backside ESD Impacts on IC Chip in Flip Chip Packaging. IRPS 2022: 14-1
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