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2020 – today
- 2024
[j4]Hyun-A. Ahn
, Yoo-Chang Sung, Yong-Hun Kim, Janghoo Kim, Kihan Kim, Dong-Hun Lee, Young-Gil Go, Jae-Woo Lee, Jae-Woo Jung, Yong-Hyun Kim, Garam Choi, Jun-Seo Park, Bo-Hyeon Lee, Jin-Hyeok Baek, Daesik Moon, Joo-Youn Lim, Daihyun Lim, Seung-Jun Bae, Tae-Young Oh:
A 1.01-V 8.5-Gb/s/pin 16-Gb LPDDR5x SDRAM With Advanced I/O Circuitry for High-Speed and Low-Power Applications. IEEE J. Solid State Circuits 59(10): 3479-3487 (2024)- [c10]IkJoon Choi, Seunghwan Hong, Kihyun Kim, Jeongsik Hwang, Seunghan Woo, Young-Sang Kim, Cheongryong Cho, Eun-Young Lee, Hun-Jae Lee, Min-Su Jung, Hee-Yun Jung, Ju-Seong Hwang, Junsub Yoon, Wonmook Lim, Hyeong-Jin Yoo, Won-Ki Lee, Jung-Kyun Oh, Dong-Su Lee, Jong-Eun Lee, Jun-Hyung Kim, Young-Kwan Kim, Su-Jin Park, Byung-Kyu Ho, Byongwook Na, Hye-In Choi, Chung-Ki Lee, Soo-Jung Lee, Hyunsung Shin, Young-Kyu Lee, Jang-Woo Ryu, Sangwoong Shin, Sungchul Park, Daihyun Lim, Seung-Jun Bae, Young-Soo Sohn, Tae-Young Oh, SangJoon Hwang:
13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process. ISSCC 2024: 234-236 - 2023
- [c9]Hyun-A. Ahn, Yoo-Chang Sung, Yong-Hun Kim, Janghoo Kim, Kihan Kim, Donghun Lee, Young-Gil Go, Jae-Woo Lee, Jae-Woo Jung, Yong-Hyun Kim, Garam Choi, Jun-Seo Park, Bo-Hyeon Lee, Jin-Hyeok Baek, Daesik Moon, Daihyun Lim, Seung-Jun Bae, Young-Soo Sohn, Changsik Yoo, Tae-Young Oh:
A 1.01V 8.5Gb/s/pin 16Gb LPDDR5x SDRAM with Self-Pre-Emphasized Stacked-Tx, Supply Voltage Insensitive Rx, and Optimized Clock Using 4th-Generation 10nm DRAM Process for High-Speed and Low-Power Applications. A-SSCC 2023: 1-4 - 2020
- [j3]Abdelrahman H. Ahmed, Abdellatif Elmoznine, Daihyun Lim, Yangjin Ma, Alexander V. Rylyakov, Sudip Shekhar:
A Dual-Polarization Silicon-Photonic Coherent Transmitter Supporting 552 Gb/s/wavelength. IEEE J. Solid State Circuits 55(9): 2597-2608 (2020)
2010 – 2019
- 2019
- [c8]Abdelrahman H. Ahmed, Daihyun Lim, Abdellatif Elmoznine, Yangjin Ma, Tam N. Huynh, Christopher Williams, Leonardo Vera, Yang Liu, Ruizhi Shi, Matthew Streshinsky, Ari Novack, Ran Ding, Rick Younce, Rafid A. Sukkar, Jose Roman, Michael Hochberg, Sudip Shekhar, Alexander V. Rylyakov:
A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter. ISSCC 2019: 484-486 - [c7]Yangjin Ma, Christopher Williams, Mostafa Gamal Ahmed, Abdellatif Elmoznine, Daihyun Lim, Yang Liu, Ruizhi Shi, Tam N. Huynh, Jose Roman, Abdelrahman H. Ahmed, Leonardo Vera, Yaojia Chen, Alexandre Horth, Hang Guan, Kishore Padmaraju, Matthew Streshinsky, Ari Novack, Rafid A. Sukkar, Rick Younce, Alexander V. Rylyakov, Dominick Scordo, Michael Hochberg:
An All-Silicon Transmitter with Co-Designed Modulator and DC-Coupled Driver. OFC 2019: 1-3 - 2018
- [c6]Ari Novack, Matthew Streshinsky, Tam N. Huynh, Tal Galfsky, Hang Guan, Yang Liu, Yangjin Ma, Ruizhi Shi, Alexandre Horth, Yaojia Chen, Amir Hanjani, Jose Roman, Yury Dziashko, Ran Ding, Saeed Fathololoumi, Andy Eu-Jin Lim, Kishore Padmaraju, Rafid A. Sukkar, Rick Younce, Harald Rohde, Robert Palmer, Guido Saathoff, Torsten Wuth, Marc Bohn, Abdelrahman H. Ahmed, Mostafa Gamal Ahmed, Christopher Williams, Daihyun Lim, Abdellatif Elmoznine, Alexander V. Rylyakov, Tom Baehr Jones, Peter Magill, Dominick Scordo, Michael Hochberg:
A Silicon Photonic Transceiver and Hybrid Tunable Laser for 64 Gbaud Coherent Communication. OFC 2018: 1-3
2000 – 2009
- 2008
- [b1]Daihyun Lim:
Characterization of process variability and robust optimization of analog circuits. Massachusetts Institute of Technology, Cambridge, MA, USA, 2008 - [c5]Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Daihyun Lim, Sangyeun Cho:
Early prediction of product performance and yield via technology benchmark. CICC 2008: 205-208 - 2007
- [c4]Duane S. Boning, Karthik Balakrishnan, Hong Cai, Nigel Drego, Ali Farahanchi, Karen Gettings, Daihyun Lim, Ajay Somani, Hayden Taylor, Daniel Truque, Xiaolin Xie:
Variation. ISQED 2007: 15-20 - [c3]Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Jean-Olivier Plouchart, Daihyun Lim, Sangyeun Cho, Robert Trzcinski:
A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology. ISQED 2007: 699-702 - [c2]Daeik D. Kim, Jonghae Kim, Jean-Olivier Plouchart, Choongyeun Cho, Weipeng Li, Daihyun Lim, Robert Trzcinski, Mahender Kumar, Christine Norris, David Ahlgren:
A 70GHz Manufacturable Complementary LC-VCO with 6.14GHz Tuning Range in 65nm SOI CMOS. ISSCC 2007: 540-620 - [c1]Daihyun Lim, Jonghae Kim, Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, Robert Trzcinski, Duane S. Boning:
Performance Variability of a 90GHz Static CML Frequency Divider in 65nm SOI CMOS. ISSCC 2007: 542-621 - 2005
- [j2]Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten van Dijk, Srinivas Devadas:
Extracting secret keys from integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1200-1205 (2005) - 2004
- [j1]Blaise Gassend, Daihyun Lim, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas:
Identification and authentication of integrated circuits. Concurr. Pract. Exp. 16(11): 1077-1098 (2004)
Coauthor Index
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