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2010 – 2019
- 2015
[j13]Nobutaro Shibata, Yusuke Ohtomo, Mika Nishisaka, Yasuhiro Sato:
An STM-16 Frame Termination VLSI With 2.5-Gb/s/Pin Input/Output Buffers: High-Speed and Low-Power Multi-𝕍DD CMOS/SIMOX Techniques. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1089-1102 (2015)- 2013
- [j12]Atsushi Kanda, Akira Ohki, Takeshi Kurosaki, Hiroaki Sanjoh, Kota Asaka
, Ryoko Yoshimura, Toshio Ito, Makoto Nakamura, Masafumi Nogawa, Yusuke Ohtomo, Mikio Yoneyama:
Small and Low-Cost Dual-Rate Optical Triplexer for OLT Transceivers in 10G/1G Co-existing 10G-EPON Systems. IEICE Trans. Electron. 96-C(7): 996-1002 (2013) - [c12]Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera:
A 25-Gb/s LD driver with area-effective inductor in a 0.18-µm CMOS. ASP-DAC 2013: 105-106 - [c11]Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Makoto Nakamura, Hiroshi Koizumi, Mitsuo Nakamura:
Analysis and design based on small-signal equivalent circuit for a lO-GHz ring VCO with 65-nm CMOS. MWSCAS 2013: 904-907 - 2012
- [j11]Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera:
Area-Effective Inductive Peaking with Interwoven Inductor for High-Speed Laser-Diode Driver for Optical Communication System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(2): 479-486 (2012) - [c10]Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera:
A 16Gb/s area-efficient LD driver with interwoven inductor in a 0.18µm CMOS. ASP-DAC 2012: 561-562 - [c9]Hiroshi Koizumi, Minoru Togashi, Masafumi Nogawa, Yusuke Ohtomo:
A 10Gb/s burst-mode laser diode driver for burst-by-burst power saving. ISSCC 2012: 414-416 - [c8]Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Makoto Nakamura, Mitsuo Nakamura:
Design method for an over-IO-Gb/s CMOS CML buffer circuit for delay control. MWSCAS 2012: 602-605 - 2011
- [j10]Hiroaki Katsurai, Hideki Kamitsuna, Hiroshi Koizumi, Jun Terada, Yusuke Ohtomo, Tsugumichi Shibata:
An Injection-Controlled 10-Gb/s Burst-Mode CDR Circuit for a 1G/10G PON System. IEICE Trans. Electron. 94-C(4): 582-588 (2011) - [c7]Akira Tsuchiya, Takeshi Kuboki, Yusuke Ohtomo, Keiji Kishine, Shigekazu Miyawaki, Makoto Nakamura, Hidetoshi Onodera:
Bandwidth enhancement for high speed amplifier utilizing mutually coupled on-chip inductors. ISOCC 2011: 36-39 - 2010
- [c6]Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera:
A 16Gbps laser-diode driver with interwoven peaking inductors in 0.18-µm CMOS. CICC 2010: 1-4
2000 – 2009
- 2009
- [c5]Jun Terada, Yusuke Ohtomo, Kazuyoshi Nishimura, Hiroaki Katsurai, Shunji Kimura, Naoto Yoshimoto:
Jitter-reduction and pulse-width-distortion compensation circuits for a 10Gb/s burst-mode CDR circuit. ISSCC 2009: 104-105 - 2008
- [j9]Yoshihito Sakai, Hideaki Kimura, Yusuke Ohtomo, Makoto Tsubokawa:
A wide range, over 9.6ns, skew compensation LSI for a flexible optical access system. IEICE Electron. Express 5(4): 157-162 (2008) - [j8]Yusuke Ohtomo, Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa:
A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI. IEICE Trans. Electron. 91-C(4): 655-661 (2008) - [j7]Yusuke Ohtomo, Masafumi Nogawa, Kazuyoshi Nishimura, Shunji Kimura, Tomoaki Yoshida, Tomoaki Kawamura, Minoru Togashi, Kiyomi Kumozaki:
A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs. IEICE Trans. Electron. 91-C(6): 903-910 (2008) - [j6]Jun Terada, Kazuyoshi Nishimura, Shunji Kimura, Hiroaki Katsurai, Naoto Yoshimoto, Yusuke Ohtomo:
A 10.3 Gb/s Burst-Mode CDR Using a ΔΣ DAC. IEEE J. Solid State Circuits 43(12): 2921-2928 (2008) - [c4]Jun Terada, Kazuyoshi Nishimura, Shunji Kimura, Hiroaki Katsurai, Naoto Yoshimoto, Yusuke Ohtomo:
A 10.3125Gb/s Burst-Mode CDR Circuit using a δσ DAC. ISSCC 2008: 226-227 - [c3]Tomoaki Kawamura, Yusuke Ohtomo, Kazuyoshi Nishimura, Noboru Ishihara:
A 1ps-Resolution 2ns-Span 10Gb/s Data-Timing Generator with Spectrum Conversion. ISSCC 2008: 456-457 - 2007
- [j5]Takashi Nakanishi, Ken-Ichi Suzuki, Youichi Fukada, Naoto Yoshimoto, Makoto Nakamura, Kazutoshi Kato, Kazuyoshi Nishimura, Yusuke Ohtomo, Makoto Tsubokawa:
High sensitivity APD burst-mode receiver for 10Gbit/s TDM-PON system. IEICE Electron. Express 4(19): 588-592 (2007) - [c2]Larry DeVito, Yusuke Ohtomo:
SE3 Last Mile Access Options: PON/DSL/Cable/Wireless. ISSCC 2007: 144-145 - 2006
- [j4]Yusuke Ohtomo, Kazuyoshi Nishimura, Masafumi Nogawa:
A 12.5-Gb/s Parallel Phase Detection Clock and Data Recovery Circuit in 0.13-$muhbox m$CMOS. IEEE J. Solid State Circuits 41(9): 2052-2057 (2006) - [c1]Masafumi Nogawa, Yusuke Ohtomo, Shunji Kimura, Kazuyoshi Nishimura, Tomoaki Kawamura, Minoru Togashi:
A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13µm CMOS. ISSCC 2006: 940-949
1990 – 1999
- 1999
- [j3]Eiji Oki, Naoaki Yamanaka, Yusuke Ohtomo, Kazuhiko Okazaki, Ryusuke Kawano:
A 10-Gb/s (1.25 Gb/s×8)4×2 0.25-μm CMOS/SIMOX ATM switch based on scalable distributed arbitration. IEEE J. Solid State Circuits 34(12): 1921-1934 (1999) - 1998
- [j2]Masafumi Nogawa, Yusuke Ohtomo:
A data-transition look-ahead DFF circuit for statistical reduction in power consumption. IEEE J. Solid State Circuits 33(5): 702-706 (1998) - 1994
- [j1]Yusuke Ohtomo, Sadayuki Yasuda, Minoru Togashi, Massyuki Ino, Yasuyuki Tanabe, Jun-ichi Inoue, Masafumi Nogawa, Sshigeki Hino:
BiCMOS circuit technology for a 704 MHz ATM switch LSI. IEEE J. Solid State Circuits 29(5): 557-563 (1994)
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