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Sang-Geun Bae
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2010 – 2019
- 2019
- [j8]Yeonho Lee, Yoonjae Choi, Junyoung Song, Sewook Hwang, Sang-Geun Bae, Jaehun Jun, Chulwoo Kim:
12-Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling With No Data Overhead and Spread Transition Scheme for 8K UHD Intra-Panel Interfaces. IEEE J. Solid State Circuits 54(2): 463-475 (2019) - [j7]Sang-Geun Bae, Sewook Hwang, Junyoung Song, Yeonho Lee, Chulwoo Kim:
A ΔΣ Modulator-Based Spread-Spectrum Clock Generator with Digital Compensation and Calibration for Phase-Locked Loop Bandwidth. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 192-196 (2019) - 2018
- [j6]Jaehun Jun, Sang-Geun Bae, Yeonho Lee, Chulwoo Kim:
A Spread Spectrum Clock Generator With Nested Modulation Profile for a High-Resolution Display System. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1509-1513 (2018) - 2017
- [j5]Sang-Geun Bae, Yongtae Kim, Yunsoo Park, Chulwoo Kim:
3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop. IEEE J. Solid State Circuits 52(2): 605-610 (2017) - [j4]Jayoung Kim, Junyoung Song, Jungtaek You, Sewook Hwang, Sang-Geun Bae, Chulwoo Kim:
A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier. IEEE Trans. Circuits Syst. II Express Briefs 64-II(6): 650-654 (2017) - [j3]Sang-Geun Bae, Gyungmin Kim, Chulwoo Kim:
A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation. IEEE Trans. Circuits Syst. II Express Briefs 64-II(10): 1132-1136 (2017) - [c1]Yeonho Lee, Yoonjae Choi, Sang-Geun Bae, Jaehun Jun, Junyoung Song, Sewook Hwang, Chulwoo Kim:
29.5 12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interfaces. ISSCC 2017: 490-491 - 2016
- [j2]Sewook Hwang, Junyoung Song, Sang-Geun Bae, Yeonho Lee, Chulwoo Kim:
An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1092-1103 (2016) - 2014
- [j1]Sang-Geun Bae, Kyeong-Woo Kim, In-Chul Hwang:
An 180 nm CMOS 1.84-to-3.62 GHz fractional-N frequency synthesizer with skewed-reset PFD for removing noise-folding effect. IEICE Electron. Express 11(15): 20140490 (2014)
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