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Thomas Carle
Person information
- affiliation: Paul Sabatier University, Toulouse, France
- affiliation (former): Brown University, Providence, Rhode Island, USA
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2020 – today
- 2024
- [b2]Thomas Carle:
Parallelism and timing predictability in real-time systems. Paul Sabatier University, Toulouse, France, 2024 - [j8]Rémi Meunier, Thomas Carle, Thierry Monteil:
Multi-core interference over-estimation reduction by static scheduling of multi-phase tasks. Real Time Syst. 60(4): 665-703 (2024) - [c18]Noïc Crouzet, Thomas Carle, Christine Rochange:
Coordinating the Fetch and Issue Warp Schedulers to Increase the Timing Predictability of GPUs. DSD 2024: 343-350 - [c17]Alban Gruin, Armelle Bonenfant, Thomas Carle, Christine Rochange:
Modelling and proving the monotonicity of processor pipelines in Coq. MEMOCODE 2024: 12-21 - [c16]Iryna De Albuquerque Silva, Thomas Carle, Adrien Gauffriau, Victor Jégu, Claire Pagetti:
A Predictable SIMD Library for GEMM Routines. RTAS 2024: 55-67 - [c15]Hector Chabot, Isabelle Puaut, Thomas Carle, Hugues Cassé:
Marmot: Extraction of Fine-Grain Memory Access Profiles for real-time software. RTNS 2024: 117-141 - [c14]Jean-Paul Bodeveix, Thomas Carle, Elie Fares, Mamoun Filali, Thai Son Hoang:
Verifying HyperLTL Properties in Event-B. ABZ 2024: 255-261 - [e1]Thomas Carle:
22nd International Workshop on Worst-Case Execution Time Analysis, WCET 2024, July 9, 2024, Lille, France. OASIcs 121, Schloss Dagstuhl - Leibniz-Zentrum für Informatik 2024, ISBN 978-3-95977-346-1 [contents] - 2023
- [j7]Iryna De Albuquerque Silva, Thomas Carle, Adrien Gauffriau, Claire Pagetti:
Extending a predictable machine learning framework with efficient gemm-based convolution routines. Real Time Syst. 59(3): 408-437 (2023) - [j6]Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat:
MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution. IEEE Trans. Computers 72(1): 183-195 (2023) - [j5]Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange:
Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3665-3678 (2023) - [c13]Alban Gruin, Thomas Carle, Christine Rochange, Pascal Sainrat:
Enabling timing predictability in the presence of store buffers. RTNS 2023: 1-10 - [c12]Louison Jeanmougin, Pascal Sotin, Christine Rochange, Thomas Carle:
Warp-Level CFG Construction for GPU Kernel WCET Analysis. WCET 2023: 1:1-1:13 - [c11]Alban Gruin, Thomas Carle, Christine Rochange, Pascal Sainrat:
Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators. WCET 2023: 2:1-2:12 - 2022
- [j4]Iryna De Albuquerque Silva, Thomas Carle, Adrien Gauffriau, Claire Pagetti:
ACETONE: Predictable Programming Framework for ML Applications in Safety-Critical Systems (Artifact). Dagstuhl Artifacts Ser. 8(1): 06:1-06:2 (2022) - [j3]Zhenyu Bai, Hugues Cassé, Marianne De Michiel, Thomas Carle, Christine Rochange:
A Framework for Calculating WCET Based on Execution Decision Diagrams. ACM Trans. Embed. Comput. Syst. 21(3): 26:1-26:26 (2022) - [c10]Iryna De Albuquerque Silva, Thomas Carle, Adrien Gauffriau, Claire Pagetti:
ACETONE: Predictable Programming Framework for ML Applications in Safety-Critical Systems. ECRTS 2022: 3:1-3:19 - [c9]Rémi Meunier, Thomas Carle, Thierry Monteil:
Correctness and Efficiency Criteria for the Multi-Phase Task Model. ECRTS 2022: 9:1-9:21 - [i2]Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange:
Computing Execution Times with eXecution Decision Diagrams in the Presence of Out-Of-Order Resources. CoRR abs/2207.07481 (2022) - 2021
- [c8]Thomas Carle, Hugues Cassé:
Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks. ARCS 2021: 19-34 - [c7]Alban Gruin, Thomas Carle, Hugues Cassé, Christine Rochange:
Speculative Execution and Timing Predictability in an Open Source RISC-V Core. RTSS 2021: 393-404 - [i1]Thomas Carle, Hugues Cassé:
Static extraction of memory access profiles for multi-core interference analysis of real-time tasks. CoRR abs/2103.17082 (2021) - 2020
- [c6]Zhenyu Bai, Hugues Cassé, Marianne De Michiel, Thomas Carle, Christine Rochange:
Improving the Performance of WCET Analysis in the Presence of Variable Latencies. LCTES 2020: 119-130
2010 – 2019
- 2018
- [c5]Thomas Carle, Hugues Cassé:
Reducing Timing Interferences in Real-Time Applications Running on Multicore Architectures. WCET 2018: 3:1-3:12 - 2016
- [c4]Thomas Carle, Dimitra Papagiannopoulou, Tali Moreshet, Andrea Marongiu, Maurice Herlihy, R. Iris Bahar:
Thrifty-malloc: A HW/SW codesign for the dynamic management of hardware transactional memory in embedded multicore systems. CASES 2016: 20:1-20:10 - 2015
- [j2]Thomas Carle, Dumitru Potop-Butucaru, Yves Sorel, David Lesens:
From Dataflow Specification to Multiprocessor Partitioned Time-triggered Real-time Implementation. Leibniz Trans. Embed. Syst. 2(2): 01:1-01:30 (2015) - [c3]Raul Gorcitz, Emilien Kofman, Thomas Carle, Dumitru Potop-Butucaru, Robert de Simone:
On the Scalability of Constraint Solving for Static/Off-Line Real-Time Scheduling. FORMATS 2015: 108-123 - 2014
- [b1]Thomas Carle:
Compilation efficace de spécifications de contrôle embarqué avec prise en compte de propriétés fonctionnelles et non-fonctionnelles complexes. (Efficient compilation of embedded control specifications with complex functional and non-functional properties). Pierre and Marie Curie University, Paris, France, 2014 - [j1]Thomas Carle, Dumitru Potop-Butucaru:
Predicate-aware, makespan-preserving software pipelining of scheduling tables. ACM Trans. Archit. Code Optim. 11(1): 12:1-12:26 (2014) - [c2]Thomas Carle, Manel Djemal, Dumitru Potop-Butucaru, Robert de Simone, Zhen Zhang:
Static Mapping of Real-Time Applications onto Massively Parallel Processor Arrays. ACSD 2014: 112-121 - [c1]Thomas Carle, Manel Djemal, Daniela Genius, François Pêcheux, Dumitru Potop-Butucaru, Robert de Simone, Franck Wajsbürt, Zhen Zhang:
Reconciling performance and predictability on a many-core through off-line mapping. ReCoSoC 2014: 1-8
Coauthor Index
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