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Hugues Cassé
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2020 – today
- 2023
- [j8]Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat:
MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution. IEEE Trans. Computers 72(1): 183-195 (2023) - [j7]Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange:
Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3665-3678 (2023) - 2022
- [j6]Zhenyu Bai, Hugues Cassé, Marianne De Michiel, Thomas Carle, Christine Rochange:
A Framework for Calculating WCET Based on Execution Decision Diagrams. ACM Trans. Embed. Comput. Syst. 21(3): 26:1-26:26 (2022) - [i3]Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange:
Computing Execution Times with eXecution Decision Diagrams in the Presence of Out-Of-Order Resources. CoRR abs/2207.07481 (2022) - 2021
- [c34]Thomas Carle, Hugues Cassé:
Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks. ARCS 2021: 19-34 - [c33]Pascal Sotin, Quentin Vermande, Hugues Cassé:
Data Cache Analysis by Counting Integer Points. RTNS 2021: 112-122 - [c32]Alban Gruin, Thomas Carle, Hugues Cassé, Christine Rochange:
Speculative Execution and Timing Predictability in an Open Source RISC-V Core. RTSS 2021: 393-404 - [i2]Thomas Carle, Hugues Cassé:
Static extraction of memory access profiles for multi-core interference analysis of real-time tasks. CoRR abs/2103.17082 (2021) - 2020
- [c31]Zhenyu Bai, Hugues Cassé, Marianne De Michiel, Thomas Carle, Christine Rochange:
Improving the Performance of WCET Analysis in the Presence of Variable Latencies. LCTES 2020: 119-130
2010 – 2019
- 2019
- [c30]Wei-Tsun Sun, Eric Jenn, Hugues Cassé:
Validating Static WCET Analysis: A Method and Its Application. WCET 2019: 6:1-6:10 - 2018
- [c29]Thomas Carle, Hugues Cassé:
Reducing Timing Interferences in Real-Time Applications Running on Multicore Architectures. WCET 2018: 3:1-3:12 - 2017
- [c28]Jordy Ruiz, Hugues Cassé, Marianne De Michiel:
Working Around Loops for Infeasible Path Detection in Binary Programs. SCAM 2017: 1-10 - [c27]Claire Maiza, Pascal Raymond, Catherine Parent-Vigouroux, Armelle Bonenfant, Fabienne Carrier, Hugues Cassé, Philippe Cuenot, Denis Claraz, Nicolas Halbwachs, Erwan Jahier, Hanbing Li, Marianne De Michiel, Vincent Mussot, Isabelle Puaut, Christine Rochange, Erven Rohou, Jordy Ruiz, Pascal Sotin, Wei-Tsun Sun:
The W-SEPT Project: Towards Semantic-Aware WCET Estimation. WCET 2017: 9:1-9:13 - 2016
- [j5]Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka:
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. ACM Trans. Embed. Comput. Syst. 15(3): 53:1-53:27 (2016) - [c26]Vincent Mussot, Jordy Ruiz, Pascal Sotin, Marianne De Michiel, Hugues Cassé:
Expressing and Exploiting Conflicts over Paths in WCET Analysis. WCET 2016: 3:1-3:11 - [c25]Wei-Tsun Sun, Hugues Cassé:
Dynamic Branch Resolution Based on Combined Static Analyses. WCET 2016: 8:1-8:10 - 2015
- [c24]Arthur Pyka, Pavel G. Zaykov, Hugues Cassé, Haluk Ozaktas, Christine Rochange, Sascha Uhrig:
Case study: Performance and WCET analysis for parallelised avionic applications with ODC2. INDIN 2015: 1400-1407 - [c23]Hugues Cassé, Haluk Ozaktas, Christine Rochange:
A Framework to Quantify the Overestimations of Static WCET Analysis. WCET 2015: 1-10 - [c22]Jordy Ruiz, Hugues Cassé:
Using SMT Solving for the Lookup of Infeasible Paths in Binary Programs. WCET 2015: 95-104 - 2014
- [c21]Hajer Herbegue, Mamoun Filali, Hugues Cassé:
Formal Architecture Specification for Time Analysis. ARCS 2014: 98-110 - 2013
- [c20]Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka:
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. DSD 2013: 363-370 - [c19]Hajer Herbegue, Hugues Cassé, Mamoun Filali, Christine Rochange:
Hardware architecture specification and constraint-based WCET computation. SIES 2013: 259-268 - [c18]Hugues Cassé, Florian Birée, Pascal Sainrat:
Multi-architecture Value Analysis for Machine Code. WCET 2013: 42-52 - 2012
- [c17]Frédéric Boniol, Hugues Cassé, Eric Noulard, Claire Pagetti:
Deterministic Execution Model on COTS Hardware. ARCS 2012: 98-110 - [c16]Armelle Bonenfant, Hugues Cassé, Marianne De Michiel, Jens Knoop, Laura Kovács, Jakob Zwirchmayr:
FFX: a portable WCET annotation language. RTNS 2012: 91-100 - [c15]Marianne De Michiel, Armelle Bonenfant, Hugues Cassé:
Normalisation of Loops with Covariant Variables. TAPAS@SAS 2012: 41-51 - 2011
- [j4]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26(6) (2011) - 2010
- [j3]Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische:
Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30(5): 66-75 (2010) - [c14]Hugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel:
Experimentation of WCET computation on both ends of automotive processor range. EDCC-CARS 2010: 67-70 - [c13]Marianne De Michiel, Armelle Bonenfant, Clément Ballabriga, Hugues Cassé:
Partial Flow Analysis with oRange. ISoLA (2) 2010: 479-482 - [c12]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC 2010: 193-201 - [c11]Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat:
OTAWA: An Open Toolbox for Adaptive WCET Analysis. SEUS 2010: 35-46 - [c10]Vincent Lefftz, Jean Bertrand, Hugues Cassé, Christophe Clienti, Philippe Coussy, Laurent Maillet-Contoz, Philippe Mercier, Pierre Moreau, Laurence Pierre, Emmanuel Vaumorin:
A Design Flow for Critical Embedded Systems. SIES 2010: 229-233 - [i1]Hugues Cassé, Karine Heydemann, Haluk Ozaktas, Jonathan Ponroy, Christine Rochange, Olivier Zendra:
A framework to experiment optimizations for real-time and embedded software. CoRR abs/1011.6031 (2010)
2000 – 2009
- 2009
- [c9]Clément Ballabriga, Hugues Cassé, Marianne De Michiel:
A Generic Framework for Blackbox Components in WCET Computation. WCET 2009 - 2008
- [c8]Clément Ballabriga, Hugues Cassé:
Improving the First-Miss Computation in Set-Associative Instruction Caches. ECRTS 2008: 341-350 - [c7]Marianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat:
Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation. RTCSA 2008: 161-166 - [c6]Clément Ballabriga, Hugues Cassé, Pascal Sainrat:
An improved approach for set-associative instruction cache partial analysis. SAC 2008: 360-367 - [c5]Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun:
Inter-task WCET computation for a-way instruction caches. SIES 2008: 169-176 - [c4]Clément Ballabriga, Hugues Cassé:
Improving the WCET computation time by IPET using control flow graph partitioning. WCET 2008 - [c3]Niklas Holsti, Jan Gustafsson, Guillem Bernat, Clément Ballabriga, Armelle Bonenfant, Roman Bourgade, Hugues Cassé, Daniel Cordes, Albrecht Kadlec, Raimund Kirner, Jens Knoop, Paul Lokuciejewski, Nicholas Merriam, Marianne De Michiel, Adrian Prantl, Bernhard Rieder, Christine Rochange, Pascal Sainrat, Markus Schordan:
WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis. WCET 2008 - 2007
- [c2]Fadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada:
Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis. SIES 2007: 25-32 - 2006
- [c1]Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun, Marianne De Michiel:
PapaBench: a Free Real-Time Benchmark. WCET 2006 - 2002
- [j2]Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat:
Une approche pour réduire la complexité du flot de contrôle dans les programmes C. Tech. Sci. Informatiques 21(7): 1009-1032 (2002)
1990 – 1999
- 1999
- [j1]Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat:
Using the abstract interpretation technique for static pointer analysis. SIGARCH Comput. Archit. News 27(1): 47-50 (1999)
Coauthor Index
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