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ORCIDJörg Mische
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2020 – today
- 2021
[j6]Jörg Mische
, Martin Frieb, Alexander Stegmeier, Theo Ungerer:
PIMP My Many-Core: Pipeline-Integrated Message Passing. Int. J. Parallel Program. 49(4): 487-505 (2021)
2010 – 2019
- 2019
- [c21]Jörg Mische, Martin Frieb, Alexander Stegmeier, Theo Ungerer:
PIMP My Many-Core: Pipeline-Integrated Message Passing. SAMOS 2019: 199-211 - 2018
- [c20]Martin Frieb, Alexander Stegmeier, Jörg Mische, Theo Ungerer:
Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips. ARCS 2018: 112-126 - [c19]Alexander Stegmeier, Martin Frieb, Jörg Mische, Theo Ungerer:
Analysing Real-Time Behaviour of Collective Communication Patterns in MPI. RTNS 2018: 137-147 - 2017
- [c18]Jörg Mische, Martin Frieb, Alexander Stegmeier, Theo Ungerer:
Reduced Complexity Many-Core: Timing Predictability Due to Message-Passing. ARCS 2017: 139-151 - [c17]Jörg Mische, Christian Mellwig, Alexander Stegmeier, Martin Frieb, Theo Ungerer:
Minimally buffered deflection routing with in-order delivery in a torus. NOCS 2017: 1:1-1:8 - 2016
- [j5]Alexander Stegmeier, Jörg Mische, Martin Frieb, Theo Ungerer:
WCTT bounds for MPI primitives in the PaterNoster NoC. SIGBED Rev. 13(4): 25-30 (2016) - [j4]Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka:
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. ACM Trans. Embed. Comput. Syst. 15(3): 53:1-53:27 (2016) - [c16]Martin Frieb, Alexander Stegmeier, Jörg Mische, Theo Ungerer:
Employing MPI Collectives for Timing Analysis on Embedded Multi-Cores. WCET 2016: 10:1-10:11 - 2014
- [c15]Jörg Mische, Theo Ungerer:
Guaranteed Service Independent of the Task Placement in NoCs with Torus Topology. RTNS 2014: 151 - 2013
- [j3]Marco Paolieri, Jörg Mische, Stefan Metzlaff, Mike Gerdes, Eduardo Quiñones, Sascha Uhrig, Theo Ungerer, Francisco J. Cazorla:
A hard real-time capable multi-core SMT processor. ACM Trans. Embed. Comput. Syst. 12(3): 79:1-79:26 (2013) - [c14]Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka:
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. DSD 2013: 363-370 - 2012
- [c13]Jörg Mische, Theo Ungerer:
Low power flitwise routing in an unidirectional torus with minimal buffering. NoCArc@MICRO 2012: 63-68 - 2011
- [b1]Jörg Mische:
Echtzeitfähige Ablaufplanung für simultan mehrfädige Prozessoren. University of Augsburg, 2011, pp. 1-163 - [j2]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26(6) (2011) - [p1]Florian Kluge, Jörg Mische, Theo Ungerer:
Dynamic Classification for Embedded Real-Time Systems. Organic Computing 2011: 579-581 - 2010
- [j1]Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische:
Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30(5): 66-75 (2010) - [c12]Florian Kluge, Sascha Uhrig, Jörg Mische, Benjamin Satzger, Theo Ungerer:
Dynamic Workload Prediction for Soft Real-Time Applications. CIT 2010: 1841-1848 - [c11]Jörg Mische, Irakli Guliashvili, Sascha Uhrig, Theo Ungerer:
How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT. ARCS 2010: 2-14 - [c10]Florian Kluge, Sascha Uhrig, Jörg Mische, Benjamin Satzger, Theo Ungerer:
Optimisation of Energy Consumption of Soft Real-Time Applications by Workload Prediction. ISORC Workshops 2010: 63-72 - [c9]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC 2010: 193-201 - [c8]Jörg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer:
Using SMT to Hide Context Switch Times of Large Real-Time Tasksets. RTCSA 2010: 255-264
2000 – 2009
- 2009
- [c7]Jörg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer:
IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor. HiPEAC 2009: 125-139 - [c6]Florian Kluge, Chenglong Yu, Jörg Mische, Sascha Uhrig, Theo Ungerer:
Implementing AUTOSAR scheduling and resource management on an embedded SMT processor. SCOPES 2009: 33-42 - 2008
- [c5]Florian Kluge, Jörg Mische, Sascha Uhrig, Theo Ungerer:
An Operating System Architecture for Organic Computing in Embedded Real-Time Systems. ATC 2008: 343-357 - [c4]Jörg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer:
Exploiting spare resources of in-order SMT processors executing hard real-time threads. ICCD 2008: 371-376 - [c3]Stefan Metzlaff, Sascha Uhrig, Jörg Mische, Theo Ungerer:
Predictable dynamic instruction scratchpad for simultaneous multithreaded processors. MEDEA@PACT 2008: 38-45 - [c2]Florian Kluge, Sascha Uhrig, Jörg Mische, Theo Ungerer:
A Two-Layered Management Architecture for Building Adaptive Real-Time Systems. SEUS 2008: 126-137 - 2007
- [c1]Sascha Uhrig, Jörg Mische, Theo Ungerer:
An IP Core for Embedded Java Systems. SAMOS 2007: 263-272
Coauthor Index
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