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2020 – today
- 2024
[j7]Mathew L. Wymore
, Rohit Sahu, Thomas Ruminski, Vishal Deep, Morgan Ambourn, Gregory Ling, Vishak Narayanan, William Asiedu, Daji Qiao, Henry Duwe:
Lure: A simulator for networks of batteryless intermittent nodes. Perform. Evaluation 166: 102440 (2024)- 2023
- [c25]Diane T. Rover, Henry Duwe, Phillip H. Jones, Nicholas D. Fila, Mani Mina:
Case Studies in Applying Design Thinking to Course Design in Computer Engineering. FIE 2023: 1-9 - [c24]Vishak Narayanan, Rohit Sahu, Jidong Sun, Henry Duwe:
BOBBER A Prototyping Platform for Batteryless Intermittent Accelerators. FPGA 2023: 221-228 - [c23]Mahmoud Gshash, Vishak Narayanan, Henry Duwe, Nathan M. Neihart:
RF Energy Harvester with Constant Off-Time Charger for Batteryless Devices. MWSCAS 2023: 259-263 - 2022
- [c22]Henry Duwe, Diane T. Rover, Phillip H. Jones, Nicholas D. Fila, Mani Mina:
Defining and Supporting a Debugging Mindset in Computer Engineering Courses. FIE 2022: 1-9 - [c21]Vishal Deep, Mathew L. Wymore, Daji Qiao, Henry Duwe:
Toward a Shared Sense of Time for a Network of Batteryless, Intermittently-powered Nodes. IPCCC 2022: 138-146 - [c20]Mathew L. Wymore, Henry Duwe:
A Tale of Two Intermittencies. SenSys 2022: 928-930 - 2021
- [c19]Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori:
Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems. ASP-DAC 2021: 318-324 - [c18]Diane T. Rover, Henry J. Duwe III, Mani Mina, Nicholas D. Fila, Phillip H. Jones, Lindsey S. Sleeth:
Learning and Professional Development Through Integrated Reflective Activities in Electrical and Computer Engineering Courses. FIE 2021: 1-9 - [c17]Rohit Sahu, Ryan Toepfer, Matthew D. Sinclair, Henry Duwe:
DENNI: Distributed Neural Network Inference on Severely Resource Constrained Edge Devices. IPCCC 2021: 1-10 - [c16]Vishal Deep, Mathew L. Wymore, Alexis A. Aurandt, Vishak Narayanan, Shen Fu, Henry Duwe, Daji Qiao:
Experimental Study of Lifecycle Management Protocols for Batteryless Intermittent Communication. MASS 2021: 355-363 - 2020
- [j6]Saunak Saha, Henry Duwe, Joseph Zambreno:
CyNAPSE: A Low-power Reconfigurable Neural Inference Accelerator for Spiking Neural Networks. J. Signal Process. Syst. 92(9): 907-929 (2020) - [c15]Mathew L. Wymore, Vishal Deep, Vishak Narayanan, Henry Duwe, Daji Qiao:
Lifecycle Management Protocols for Batteryless, Intermittent Sensor Nodes. IPCCC 2020: 1-8 - [c14]Vishal Deep, Vishak Narayanan, Mathew L. Wymore, Daji Qiao, Henry Duwe:
HARC: A Heterogeneous Array of Redundant Persistent Clocks for Batteryless, Intermittently-Powered Systems. RTSS 2020: 270-282
2010 – 2019
- 2019
- [c13]Saunak Saha, Henry Duwe, Joseph Zambreno:
An Adaptive Memory Management Strategy Towards Energy Efficient Machine Inference in Event-Driven Neuromorphic Accelerators. ASAP 2019: 197-205 - [c12]Vishal Deep, Aditi Mishra, Daji Qiao, Henry Duwe:
Revisiting Time Remanence Clocks for Energy Harvesting Wireless Sensor Nodes. ENSsys@SenSys 2019: 58-59 - 2018
- [j5]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Bespoke Processors for Applications with Ultra-Low Area and Power Constraints. IEEE Micro 38(3): 32-39 (2018) - 2017
- [b1]Henry Duwe:
Dependable design for low-cost ultra-low-power processors. University of Illinois Urbana-Champaign, USA, 2017 - [j4]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Determining Application-Specific Peak Power and Energy Requirements for Ultra-Low-Power Processors. ACM Trans. Comput. Syst. 35(3): 9:1-9:33 (2017) - [c11]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Determining Application-specific Peak Power and Energy Requirements for Ultra-low Power Processors. ASPLOS 2017: 3-16 - [c10]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Enabling Effective Module-Oblivious Power Gating for Embedded Processors. HPCA 2017: 157-168 - [c9]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Bespoke Processors for Applications with Ultra-low Area and Power Constraints. ISCA 2017: 41-54 - [c8]Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori:
Software-based gate-level information flow security for IoT systems. MICRO 2017: 328-340 - 2016
- [c7]Matthew Vilim, Henry Duwe, Rakesh Kumar:
Approximate bitcoin mining. DAC 2016: 97:1-97:6 - [c6]Frederic Sala, Henry Duwe, Lara Dolecek, Rakesh Kumar:
A Unified Framework for Error Correction in On-chip Memories. DSN Workshops 2016: 268-274 - [c5]Henry Duwe, Xun Jian, Daniel Petrisko, Rakesh Kumar:
Rescuing Uncorrectable Fault Patterns in On-Chip Memories through Error Pattern Transformation. ISCA 2016: 634-644 - [c4]Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar:
Bit Serializing a Microprocessor for Ultra-low-power. ISLPED 2016: 200-205 - 2015
- [c3]Henry Duwe, Xun Jian, Rakesh Kumar:
Correction prediction: Reducing error correction latency for on-chip memories. HPCA 2015: 463-475 - 2014
- [j3]Jason Cong, Henry Duwe, Rakesh Kumar, Sen Li:
Better-Than-Worst-Case Design: Progress and Opportunities. J. Comput. Sci. Technol. 29(4): 656-663 (2014) - 2013
- [j2]Xun Jian, John Sartori, Henry Duwe, Rakesh Kumar:
High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional Parity. IEEE Comput. Archit. Lett. 12(2): 39-42 (2013) - [j1]Amin Farmahini Farahani, Henry J. Duwe III, Michael J. Schulte, Katherine Compton:
Modular Design of High-Throughput, Low-Latency Sorting Units. IEEE Trans. Computers 62(7): 1389-1402 (2013) - [c2]Biplab Deka, Alex A. Birklykke, Henry Duwe, Vikash K. Mansinghka, Rakesh Kumar:
Markov chain algorithms: A template for building future robust low power systems. ACSSC 2013: 118-125 - [c1]Xun Jian, Henry Duwe, John Sartori, Vilas Sridharan, Rakesh Kumar:
Low-power, low-storage-overhead chipkill correct via multi-line error correction. SC 2013: 24:1-24:12
Coauthor Index
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