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Yu Pu
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2020 – today
- 2024
- [j20]Di Wang, Yushuang Li, Yu Pu, Yan Lv, Mingji Wang, Hui Yang, Xuefeng Zhao, Dong Li:
Vertical Distribution Mapping for Methane Fugitive Emissions Using Laser Path-Integral Sensing in Non-Cooperative Open Paths. Sensors 24(4): 1307 (2024) - [i2]Jinpeng Li, Yu Pu, Qi Sun, Wei-Qiang Zhang:
Improving Whisper's Recognition Performance for Under-Represented Language Kazakh Leveraging Unpaired Speech and Text. CoRR abs/2408.05554 (2024) - 2023
- [c25]Xuchu Chen, Yu Pu, Jinpeng Li, Wei-Qiang Zhang:
Cross-Lingual Alzheimer's Disease Detection Based on Paralinguistic and Pre-Trained Features. ICASSP 2023: 1-2 - [c24]Chengdong Lin, Kun Wang, Zhenjiang Li, Yu Pu:
A Workload-Aware DVFS Robust to Concurrent Tasks for Mobile Devices. MobiCom 2023: 19:1-19:16 - [i1]Xuchu Chen, Yu Pu, Jinpeng Li, Wei-Qiang Zhang:
Cross-lingual Alzheimer's Disease detection based on paralinguistic and pre-trained features. CoRR abs/2303.07650 (2023) - 2021
- [j19]Nabil Sabor, Yongfu Li, Zhe Zhang, Yu Pu, Guoxing Wang, Yong Lian:
Detection of the interictal epileptic discharges based on wavelet bispectrum interaction and recurrent neural network. Sci. China Inf. Sci. 64(6) (2021) - [j18]Kai Zhao, Yongfu Li, Guoxing Wang, Yu Pu, Yong Lian:
A robust QRS detection and accurate R-peak identification algorithm for wearable ECG sensors. Sci. China Inf. Sci. 64(8) (2021) - [j17]Shengling Wang, Yu Pu, Hongwei Shi, Jianhui Huang, Yinhao Xiao:
A differential game view of antagonistic dynamics for cybersecurity. Comput. Networks 200: 108494 (2021) - [j16]Sung Justin Kim, Dongkwun Kim, Yu Pu, Chunlei Shi, Soo Bong Chang, Mingoo Seok:
0.5-1-V, 90-400-mA, Modular, Distributed, 3 × 3 Digital LDOs Based on Event-Driven Control and Domino Sampling and Regulation. IEEE J. Solid State Circuits 56(9): 2781-2794 (2021) - [c23]Ang Li, Jingwei Sun, Pengcheng Li, Yu Pu, Hai Li, Yiran Chen:
Hermes: an efficient federated learning framework for heterogeneous mobile clients. MobiCom 2021: 420-437 - 2020
- [j15]Menghan Jia, Feiteng Li, Jiaquan Wu, Zhijian Chen, Yu Pu:
Robust QRS Detection Using High-Resolution Wavelet Packet Decomposition and Time-Attention Convolutional Neural Network. IEEE Access 8: 16979-16988 (2020) - [j14]Menghan Jia, Feiteng Li, Yu Pu, Zhijian Chen:
A Lossless Electrocardiogram Compression System Based on Dual-Mode Prediction and Error Modeling. IEEE Access 8: 101153-101162 (2020) - [j13]Jiaquan Wu, Feiteng Li, Zhijian Chen, Xiaoyan Xiang, Yu Pu:
Patient-Specific ECG Classification with Integrated Long Short-Term Memory and Convolutional Neural Networks. IEICE Trans. Inf. Syst. 103-D(5): 1153-1163 (2020) - [j12]Joao Pedro Cerqueira, Thomas J. Repetti, Yu Pu, Shivam Priyadarshi, Martha A. Kim, Mingoo Seok:
Catena: A Near-Threshold, Sub-0.4-mW, 16-Core Programmable Spatial Array Accelerator for the Ultralow-Power Mobile and Embedded Internet of Things. IEEE J. Solid State Circuits 55(8): 2270-2284 (2020) - [c22]Chen Chen, Xiaoyan Xiang, Chang Liu, Yunhai Shang, Ren Guo, Dongqi Liu, Yimin Lu, Ziyi Hao, Jiahui Luo, Zhijian Chen, Chunqiang Li, Yu Pu, Jianyi Meng, Xiaolang Yan, Yuan Xie, Xiaoning Qi:
Xuantie-910: Innovating Cloud and Edge Computing by RISC-V. Hot Chips Symposium 2020: 1-19 - [c21]Chen Chen, Xiaoyan Xiang, Chang Liu, Yunhai Shang, Ren Guo, Dongqi Liu, Yimin Lu, Ziyi Hao, Jiahui Luo, Zhijian Chen, Chunqiang Li, Yu Pu, Jianyi Meng, Xiaolang Yan, Yuan Xie, Xiaoning Qi:
Xuantie-910: A Commercial Multi-Core 12-Stage Pipeline Out-of-Order 64-bit High Performance RISC-V Processor with Vector Extension : Industrial Product. ISCA 2020: 52-64 - [c20]Yuqi Wang, Jian Chen, Yu Pu, Yajun Ha:
Energy-Efficient Arbitrary Precision Multi-Bit Multiplication with Bi-Serial In/Near Memory Computing. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j11]Feiteng Li, Jiaquan Wu, Menghan Jia, Zhijian Chen, Yu Pu:
Automated Heartbeat Classification Exploiting Convolutional Neural Network With Channel-Wise Attention. IEEE Access 7: 122955-122963 (2019) - [j10]Jiaquan Wu, Feiteng Li, Zhijian Chen, Yu Pu, Mengyuan Zhan:
A Neural Network-Based ECG Classification Processor With Exploitation of Heartbeat Similarity. IEEE Access 7: 172774-172782 (2019) - [c19]Joao Pedro Cerqueira, Thomas J. Repetti, Yu Pu, Shivam Priyadarshi, Martha A. Kim, Mingoo Seok:
Catena: A 0.5-V Sub-0.4-mW 16-Core Spatial Array Accelerator for Mobile and Embedded Computing. VLSI Circuits 2019: 54- - [c18]Sung Justin Kim, Dongkwun Kim, Yu Pu, Chunlei Shi, Mingoo Seok:
A 0.5-1V Input Event-Driven Multiple Digital Low-Dropout-Regulator System for Supporting a Large Digital Load. VLSI Circuits 2019: 128- - 2018
- [j9]Yu Pu, Chunlei Shi, Giby Samson, Dongkyu Park, Ken Easton, Rudy Beraha, Adam Newham, Mark Lin, Venkat Rangan, Karam Chatha, Danny Butterfield, Rashid Attar:
A 9-mm2 Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things. IEEE J. Solid State Circuits 53(3): 936-948 (2018) - [j8]Le Guan, Sadegh Farhang, Yu Pu, Pinyao Guo, Jens Grossklags, Peng Liu:
VaultIME: Regaining User Control for Password Managers through Auto-correction. EAI Endorsed Trans. Security Safety 4(14): e4 (2018) - [c17]Yu Pu, Danny Butterfield, Jorge Garcia, Jing Xie, Mark Lin, Rohit Sauhta, Rick Farley, Steve Shellhammer, Moses Derkalousdian, Adam Newham, Chunlei Shi, Ravi Shenoy, Evgeni Gousev, Rashid Attar:
An Ultra-low-power 28nm CMOS Dual-die ASIC Platform for Smart Hearables. BioCAS 2018: 1-4 - 2017
- [c16]Yu Pu, Giby Samson, Chunlei Shi, Dongkyu Park, Ken Easton, Rudy Beraha, J. Hadi, Mark Lin, E. Arvelo, J. Fatehi, J. Kumar, Moses Derkalousdian, P. Aghera, Adam Newham, H. Sheraji, Karam Chatha, R. McLaren, V. Ganesan, S. Namasivayam, Danny Butterfield, Ravi Shenoy, Rashid Attar:
Blackghost: An ultra-low-power all-in-one 28nm CMOS SoC for Internet-of-Things. COOL Chips 2017: 1-3 - [c15]Le Guan, Sadegh Farhang, Yu Pu, Pinyao Guo, Jens Grossklags, Peng Liu:
VaultIME: Regaining User Control for Password Managers Through Auto-Correction. SecureComm 2017: 673-686 - [c14]Yu Pu, Jens Grossklags:
Valuating Friends' Privacy: Does Anonymity of Sharing Personal Data Matter? SOUPS 2017: 339-355 - 2016
- [j7]Yu Pu, Jens Grossklags:
Towards a Model on the Factors Influencing Social App Users' Valuation of Interdependent Privacy. Proc. Priv. Enhancing Technol. 2016(2): 61-81 (2016) - [c13]Yu Pu, Jens Grossklags:
Sharing Is Caring, or Callous? CANS 2016: 670-680 - 2015
- [c12]Yu Pu, Jens Grossklags:
Using Conjoint Analysis to Investigate the Value of Interdependent Privacy in Social App Adoption Scenarios. ICIS 2015 - [c11]Christopher Lawrence Ayala, Antonios Bazigos, Daniel Grogg, Yu Pu, Christoph Hagleitner:
Ultra-low-energy adiabatic dynamic logic circuits using nanoelectromechanical switches. ISCAS 2015: 2596-2599 - 2014
- [j6]Ajay Kapoor, Cas Groot, Gerard Villar Pique, Hamed Fatemi, Juan Diego Echeverri, Leo Sevat, Maarten Vertregt, Maurice Meijer, Vibhu Sharma, Yu Pu, José Pineda de Gyvez:
Digital Systems Power Management for High Performance Mixed Signal Platforms. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(4): 961-975 (2014) - [c10]Yu Pu, Juan Diego Echeverri, Maurice Meijer, José Pineda de Gyvez:
Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling. DATE 2014: 1-2 - [c9]Yu Pu, Jens Grossklags:
An Economic Model and Simulation Results of App Adoption Decisions on Networks with Interdependent Privacy Consequences. GameSec 2014: 246-265 - 2013
- [c8]Sunil Rana, Tian Qin, Dinesh Pamunuwa, Daniel Grogg, Michel Despont, Yu Pu, Christoph Hagleitner:
Modelling NEM relays for digital circuit applications. ISCAS 2013: 805-808 - 2012
- [j5]Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation. IEEE Trans. Circuits Syst. II Express Briefs 59-II(6): 361-365 (2012) - [c7]Tadashi Yasufuku, Koji Hirairi, Yu Pu, Yun Fei Zheng, Ryo Takahashi, Masato Sasaki, Hiroshi Fuketa, Atsushi Muramatsu, Masahiro Nomura, Hirofumi Shinohara, Makoto Takamiya, Takayasu Sakurai:
24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in VDDmin limited ultra low voltage logic circuits. ISQED 2012: 586-591 - 2011
- [j4]Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Takayasu Sakurai, Makoto Takamiya:
A Variable Output Voltage Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction at Low Output Voltage. IEICE Trans. Electron. 94-C(6): 953-959 (2011) - [j3]Yu Pu, Xin Zhang, Katsuyuki Ikeuchi, Atsushi Muramatsu, Atsushi Kawasumi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai:
Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits. IEEE Trans. Circuits Syst. II Express Briefs 58-II(5): 294-298 (2011) - [j2]Yu Pu, Yifan He, Zhenyu Ye, Sebastian M. Londono, Anteneh A. Abbo, Richard P. Kleihorst, Henk Corporaal:
From Xetal-II to Xetal-Pro: On the Road Toward an Ultralow-Energy and High-Throughput SIMD Processor. IEEE Trans. Circuits Syst. Video Technol. 21(4): 472-484 (2011) - 2010
- [j1]Yu Pu, José de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha:
An Ultra-Low-Energy Multi-Standard JPEG Co-Processor in 65 nm CMOS With Sub/Near Threshold Supply Voltage. IEEE J. Solid State Circuits 45(3): 668-680 (2010) - [c6]Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, Anteneh A. Abbo, Sebastian M. Londono, Henk Corporaal:
Xetal-Pro: an ultra-low energy and high throughput SIMD processor. DAC 2010: 543-548 - [c5]Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Masahiro Nomura, Koji Hirairi, Hidehiro Takata, Taro Sakurabayashi, Shinji Miyano, Makoto Takamiya, Takayasu Sakurai:
Misleading energy and performance claims in sub/near threshold digital systems. ICCAD 2010: 625-631
2000 – 2009
- 2009
- [c4]Yu Pu, José de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha:
An ultra-low-energy/frame multi-standard JPEG co-processor in 65nm CMOS with sub/near-threshold power supply. ISSCC 2009: 146-147 - 2008
- [c3]Yu Pu, José de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha:
Statistical noise margin estimation for sub-threshold combinational circuits. ASP-DAC 2008: 176-179 - 2007
- [c2]Yu Pu, José de Jesus Pineda de Gyvez, Henk Corporaal, Yajun Ha:
Vt balancing and device sizing towards high yield of sub-threshold static logic gates. ISLPED 2007: 355-358 - 2006
- [c1]Yu Pu, Yajun Ha:
An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model. ASP-DAC 2006: 886-891
Coauthor Index
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last updated on 2024-12-11 21:39 CET by the dblp team
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