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Maurice Meijer
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2020 – today
- 2024
- [c19]Man Shi, Vikram Jain, Antony Joseph, Maurice Meijer, Marian Verhelst:
BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration. HPCA 2024: 732-746 - [c18]Mustafa Fuad Rifet Ibrahim, Tunç Alkanat, Maurice Meijer, Alexander Schlaefer, Peer Stelldinger:
Artifact: End-to-End Multi-Modal Tiny-CNN for Cardiovascular Monitoring on Sensor Patches. PerCom Workshops 2024: 5-6 - [c17]Mustafa Fuad Rifet Ibrahim, Tunç Alkanat, Maurice Meijer, Alexander Schlaefer, Peer Stelldinger:
End-to-End Multi-Modal Tiny-CNN for Cardiovascular Monitoring on Sensor Patches. PerCom 2024: 18-24 - [i1]Man Shi, Steven Colleman, Charlotte VanDeMieroop, Antony Joseph, Maurice Meijer, Wim Dehaene, Marian Verhelst:
CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories. CoRR abs/2406.14574 (2024) - 2023
- [c16]Man Shi, Steven Colleman, Charlotte VanDeMieroop, Antony Joseph, Maurice Meijer, Wim Dehaene, Marian Verhelst:
CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories. ISQED 2023: 1-8
2010 – 2019
- 2014
- [j6]Ajay Kapoor, Cas Groot, Gerard Villar Pique, Hamed Fatemi, Juan Diego Echeverri, Leo Sevat, Maarten Vertregt, Maurice Meijer, Vibhu Sharma, Yu Pu, José Pineda de Gyvez:
Digital Systems Power Management for High Performance Mixed Signal Platforms. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(4): 961-975 (2014) - [c15]Yu Pu, Juan Diego Echeverri, Maurice Meijer, José Pineda de Gyvez:
Logic synthesis of low-power ICs with ultra-wide voltage and frequency scaling. DATE 2014: 1-2 - 2012
- [j5]Maurice Meijer, José Pineda de Gyvez:
Body-Bias-Driven Design Strategy for Area- and Performance-Efficient CMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 42-51 (2012) - 2011
- [c14]Gerard Villar Pique, Maurice Meijer:
A 350nA voltage regulator for 90nm CMOS digital circuits with Reverse-Body-Bias. ESSCIRC 2011: 379-382 - 2010
- [j4]Maurice Meijer, José Pineda de Gyvez, Ajay Kapoor:
Ultra-Low-Power Digital Design with Body Biasing for Low Area and Performance-Efficient Operation. J. Low Power Electron. 6(4): 521-532 (2010) - [c13]Maurice Meijer, José Pineda de Gyvez, Ben Kup, Bert van Uden, Peter Bastiaansen, Marco Lammers, Maarten Vertregt:
A forward body bias generator for digital CMOS circuits with supply voltage scaling. ISCAS 2010: 2482-2485 - [c12]Maurice Meijer, José Pineda de Gyvez:
Body bias driven design synthesis for optimum performance per area. ISQED 2010: 472-477
2000 – 2009
- 2009
- [j3]Josep Rius, Maurice Meijer:
Analysis of the Influence of Substrate on the Performance of On-Chip MOS Decoupling Capacitors. IEEE J. Solid State Circuits 44(2): 484-494 (2009) - [c11]Josep Rius, Luis Elvira Villagra, Maurice Meijer:
A Voltage-Mode Testing Method to Detect IDDQ Defects in Digital Circuits. ETS 2009: 135-140 - 2007
- [j2]Sandeep Kumar Goel, Maurice Meijer, José Pineda de Gyvez:
Efficient testing and diagnosis of faulty power switches in SOCs. IET Comput. Digit. Tech. 1(3): 230-236 (2007) - 2006
- [j1]Josep Rius, Maurice Meijer, José Pineda de Gyvez:
An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits. J. Low Power Electron. 2(1): 80-86 (2006) - [c10]Maurice Meijer, Rohini Krishnan, Martijn T. Bennebroek:
Energy-efficient FPGA interconnect design. DATE Designers' Forum 2006: 42-47 - [c9]Sandeep Kumar Goel, Maurice Meijer, José Pineda de Gyvez:
Testing and Diagnosis of Power Switches in SOCs. ETS 2006: 145-150 - 2005
- [c8]Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Limits to performance spread tuning using adaptive voltage and body biasing. ISCAS (1) 2005: 5-8 - [c7]Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Glitch-free discretely programmable clock generation on chip. ISCAS (2) 2005: 1839-1842 - [c6]Maurice Meijer, José Pineda de Gyvez, Ralph Otten:
On-chip digital power supply control for system-on-chip applications. ISLPED 2005: 311-314 - [c5]Josep Rius, José Pineda de Gyvez, Maurice Meijer:
An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits. PATMOS 2005: 187-196 - [c4]Atul Katoch, Maurice Meijer, Sanjeev K. Jain:
Active Noise Cancellation Using Aggressor-Aware Clamping Circuit for Robust On-Chip Communication. VLSI Design 2005: 325-329 - 2004
- [c3]Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Technology exploration for adaptive power and frequency scaling in 90nm CMOS. ISLPED 2004: 14-19 - [c2]André K. Nieuwland, Atul Katoch, Maurice Meijer:
Reducing Cross-Talk Induced Power Consumption and Delay. PATMOS 2004: 179-188 - 2003
- [c1]Atul Katoch, Sanjeev K. Jain, Maurice Meijer:
Aggressor aware repeater circuits for improving on-chip bus performance and robustness. ESSCIRC 2003: 261-264
Coauthor Index
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