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ORCIDNarendra Devta-Prasanna
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2010 – 2019
- 2014
[p2]Sandeep Kumar Goel, Narendra Devta-Prasanna:
Hybrid/Top-off Test Pattern Generation Schemes for Small-Delay Defects. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits 2014: 147-160- [p1]Narendra Devta-Prasanna, Sandeep Kumar Goel:
Small-Delay Defect Coverage Metrics. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits 2014: 185-210 - 2012
- [c20]Sreejit Chakravarty, Narendra Devta-Prasanna, Arun Gunda, Junxia Ma, Fan Yang, H. Guo, R. Lai, D. Li:
Silicon evaluation of faster than at-speed transition delay tests. VTS 2012: 80-85 - [c19]Wei Zhao, Sreejit Chakravarty, Junxia Ma, Narendra Devta-Prasanna, Fan Yang, Mohammad Tehranipoor:
A novel method for fast identification of peak current during test. VTS 2012: 191-196 - 2010
- [c18]Narendra Devta-Prasanna, Arun Gunda:
Clock Gate Test Points. ITC 2010: 84-93 - [c17]Narendra Devta-Prasanna, Arun Gunda, Sudhakar M. Reddy, Irith Pomeranz:
Multiple fault activation cycle tests for transistor stuck-open faults. ITC 2010: 821
2000 – 2009
- 2009
- [c16]Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
Detectability of internal bridging faults in scan chains. ASP-DAC 2009: 678-683 - [c15]Fan Yang
, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
Improving the Detectability of Resistive Open Faults in Scan Cells. DFT 2009: 383-391 - [c14]Narendra Devta-Prasanna, Sandeep Kumar Goel, Arun Gunda, Mark Ward, P. Krishnamurthy:
Accurate measurement of small delay defect coverage of test patterns. ITC 2009: 1-10 - [c13]Sandeep Kumar Goel, Narendra Devta-Prasanna, Mark Ward:
Comparing the effectiveness of deterministic bridge fault and multiple-detect stuck fault patterns for physical bridge defects: A simulation and silicon study. ITC 2009: 1-10 - [c12]Sandeep Kumar Goel, Narendra Devta-Prasanna, Ritesh P. Turakhia:
Effective and Efficient Test Pattern Generation for Small Delay Defect. VTS 2009: 111-116 - 2008
- [j2]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda:
Comparative study of centralised and distributed compatibility-based test data compression. IET Comput. Digit. Tech. 2(2): 108-117 (2008) - [c11]Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells. DFT 2008: 394-402 - [c10]Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
An Enhanced Logic BIST Architecture for Online Testing. IOLTS 2008: 10-15 - [c9]Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
Detection of Internal Stuck-open Faults in Scan Chains. ITC 2008: 1-10 - [c8]Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
On the Detectability of Scan Chain Internal Faults - An Industrial Case Study. VTS 2008: 79-84 - 2007
- [j1]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Erik Chmelar, M. Grinchuk, Arun Gunda:
Scan Test Cost and Power Reduction Through Systematic Scan Reconfiguration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 907-918 (2007) - [c7]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda:
Systematic Scan Reconfiguration. ASP-DAC 2007: 738-743 - 2006
- [c6]Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz:
Test Generation for Open Defects in CMOS Circuits. DFT 2006: 41-49 - [c5]Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz:
A Unified Method to Detect Transistor Stuck-Open Faults and Transition Delay Faults. ETS 2006: 185-192 - 2005
- [c4]Narendra Devta-Prasanna, Sudhakar M. Reddy, Arun Gunda, P. Krishnamurthy, Irith Pomeranz:
Improved Delay Fault Coverage Using Subsets of Flip-flops to Launch Transitions. Asian Test Symposium 2005: 202-207 - [c3]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda:
Should Illinois-Scan Based Architectures be Centralized or Distributed? DFT 2005: 406-414 - [c2]Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz:
A Novel Method of Improving Transition Delay Fault Coverage Using Multiple Scan Enable Signals. ICCD 2005: 471-474 - [c1]Narendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz:
Methods for improving transition delay fault coverage using broadside tests. ITC 2005: 10
Coauthor Index
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