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ORCIDAkhilesh Tyagi
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2020 – today
- 2024
[j32]Ravikumar Selvam
, Akhilesh Tyagi:
Residue Number System (RNS) and Power Distribution Network Topology-Based Mitigation of Power Side-Channel Attacks. Cryptogr. 8(1): 1 (2024)- 2023
- [j31]Xinyao Li, Akhilesh Tyagi:
Block-Active ADMM to Minimize NMF with Bregman Divergences. Sensors 23(16): 7229 (2023) - [j30]Ravikumar Selvam, Akhilesh Tyagi:
A Side-Channel Evaluation of On-chip Vdd Distribution Network with Decoupling Capacitance. SN Comput. Sci. 4(1): 77 (2023) - [c77]Ananda Biswas, Akhilesh Tyagi:
Huffman Cache Trails. iSES 2023: 277-282 - 2022
- [j29]Timothy Dee, Ian Richardson, Akhilesh Tyagi:
Continuous Nonintrusive Mobile Device Soft Keyboard Biometric Authentication. Cryptogr. 6(2): 14 (2022) - [j28]Ravikumar Selvam, Akhilesh Tyagi:
An Evaluation of Power Side-Channel Resistance for RNS Secure Logic. Sensors 22(6): 2242 (2022) - [j27]Xinyao Li, Akhilesh Tyagi:
Cross-World Covert Channel on ARM Trustzone through PMU. Sensors 22(19): 7354 (2022) - [j26]Ananda Biswas, Zelong Li, Akhilesh Tyagi:
Performance Counters and DWT Enabled Control Flow Integrity. SN Comput. Sci. 3(1): 48 (2022) - [c76]Zelong Li, Akhilesh Tyagi:
Transient State Signaling for Spectre/Meltdown Transient Cache Side-channel Prevention. SECRYPT 2022: 655-660 - 2021
- [j25]Timothy Dee, Akhilesh Tyagi:
Message Integrity and Authenticity in Secure CAN. IEEE Consumer Electron. Mag. 10(5): 33-40 (2021) - [j24]Hala Hamadeh, Akhilesh Tyagi:
An FPGA Implementation of Privacy Preserving Data Provenance Model Based on PUF for Secure Internet of Things. SN Comput. Sci. 2(1): 65 (2021) - [c75]Ravikumar Selvam, Akhilesh Tyagi:
Power Distribution Network Capacitive Decoupling for Side-Channel Resistance. iSES 2021: 183-188 - [c74]Ananda Biswas, Timothy Dee, Yunxi Guo, Zelong Li, Akhilesh Tyagi:
Multi-Granularity Control Flow Anomaly Detection with Hardware Counters. WF-IoT 2021: 449-454 - 2020
- [j23]Timothy Dee, Ryan A. Scheel, Nicholas Montelibano, Akhilesh Tyagi:
User-Silicon Entangled Mobile Identity Authentication. J. Hardw. Syst. Secur. 4(3): 208-229 (2020) - [c73]Hala Hamadeh, Abdallah M. Almomani, Akhilesh Tyagi:
Probabilistic Verification of Outsourced Computation Based on Novel Reversible PUFs. ESOCC 2020: 30-37 - [c72]Ananda Biswas, Zelong Li, Akhilesh Tyagi:
Control Flow Integrity in IoT Devices with Performance Counters and DWT. iSES 2020: 171-176 - [c71]V. M. Vaidyan, Akhilesh Tyagi:
Instruction Level Disassembly through Electromagnetic Side-Chanel: Machine Learning Classification Approach with Reduced Combinatorial Complexity. SPML 2020: 124-130 - [c70]Timothy Dee, Akhilesh Tyagi:
Secure CAN for Connected Vehicles. WF-IoT 2020: 1-6
2010 – 2019
- 2019
- [c69]Hala Hamadeh, Akhilesh Tyagi:
Physical Unclonable Functions (PUFs) Entangled Trusted Computing Base. iSES 2019: 177-180 - [c68]Hala Hamadeh, Akhilesh Tyagi:
Privacy Preserving Data Provenance Model Based on PUF for Secure Internet of Things. iSES 2019: 189-194 - [c67]Timothy Dee, Ian Richardson, Akhilesh Tyagi:
Continuous Transparent Mobile Device Touchscreen Soft Keyboard Biometric Authentication. VLSID 2019: 539-540 - 2018
- [j22]Yunxi Guo, Timothy Dee, Akhilesh Tyagi:
Barrel Shifter Physical Unclonable Function Based Encryption. Cryptogr. 2(3): 22 (2018) - [c66]Yunxi Guo, Timothy Dee, Akhilesh Tyagi:
Multi-block APUF with 2-Level Voltage Supply. ISVLSI 2018: 327-332 - [c65]Yunxi Guo, Timothy Dee, Akhilesh Tyagi:
Variation Enhancement of Arbiter PUFs with Asymmetric Layout. MWSCAS 2018: 841-844 - [c64]Ravikumar Selvam, Akhilesh Tyagi:
Power Side Channel Resistance of RNS Secure Logic. VLSID 2018: 143-148 - 2017
- [j21]Jungmin Park, Akhilesh Tyagi:
Using Power Clues to Hack IoT Devices: The power side channel provides for instruction-level disassembly. IEEE Consumer Electron. Mag. 6(3): 92-102 (2017) - [j20]Hala Hamadeh, Soma Chaudhuri, Akhilesh Tyagi:
Area, energy, and time assessment for a distributed TPM for distributed trust in IoT clusters. Integr. 58: 267-273 (2017) - [j19]Varun Venkatesan, Swamy D. Ponpandi, Akhilesh Tyagi:
Shaping data for application performance and energy optimization in dynamic data view framework. Integr. 58: 311-319 (2017) - [j18]Yunxi Guo, Akhilesh Tyagi:
Voice-Based User-Device Physical Unclonable Functions for Mobile Device Authentication. J. Hardw. Syst. Secur. 1(1): 18-37 (2017) - [i1]Yunxi Guo, Timothy Dee, Akhilesh Tyagi:
Barrel Shifter Physical Unclonable Function Based Encryption. CoRR abs/1711.05332 (2017) - 2016
- [j17]Akhilesh Tyagi, John H. Reif:
Energy Complexity of Optical Computations. Int. J. Unconv. Comput. 12(5-6): 393-412 (2016) - [c63]Yunxi Guo, Akhilesh Tyagi:
Voice Based User-Device Physical Unclonable Functions for Mobile Device Authentication. ISVLSI 2016: 512-517 - [c62]Jungmin Park, Akhilesh Tyagi:
Security Metrics for Power Based SCA Resistant Hardware Implementation. VLSID 2016: 541-546 - 2015
- [c61]Ryan A. Scheel, Akhilesh Tyagi:
Characterizing Composite User-Device Touchscreen Physical Unclonable Functions (PUFs) for Mobile Device Authentication. TrustED@CCS 2015: 3-13 - [c60]Hala Hamadeh, Soma Chaudhuri, Akhilesh Tyagi:
Area, Energy, and Time Assessment for a Distributed TPM for Distributed Trust in IoT Clusters. iNIS 2015: 225-230 - [c59]Varun Venkatesan, Swamy D. Ponpandi, Akhilesh Tyagi:
Dynamic Data Shapers Optimize Performance in Dynamic Binary Optimization (DBO) Environment. iNIS 2015: 325-330 - 2014
- [j16]Swamy D. Ponpandi, Akhilesh Tyagi:
User satisfaction aware routing and energy modeling of polymorphic network on chip architecture. Comput. Electr. Eng. 40(8): 260-275 (2014) - [j15]Ka-Ming Keung, Swamy D. Ponpandi, Akhilesh Tyagi:
A placer for composable FPGA with 2D mesh network. Int. J. Embed. Syst. 6(4): 289-302 (2014) - [c58]Zhang Zhang, Swamy D. Ponpandi, Akhilesh Tyagi:
An Evaluation of User Satisfaction Driven Scheduling in a Polymorphic Embedded System. IPDPS Workshops 2014: 263-268 - [c57]Mahadevan Gomathisankaran, Akhilesh Tyagi:
Glitch Resistant Private Circuits Design Using HORNS. ISVLSI 2014: 522-527 - [c56]Jungmin Park, Akhilesh Tyagi:
Towards Making Private Circuits Practical: DPA Resistant Private Circuits. ISVLSI 2014: 528-533 - [c55]Jungmin Park, Akhilesh Tyagi:
t-Private Systems: Unified Private Memories and Computation. SPACE 2014: 285-302 - 2013
- [c54]Swamy D. Ponpandi, Akhilesh Tyagi:
User satisfaction aware routing decisions in NOC. NoCArc@MICRO 2013: 11-16 - [c53]Swamy D. Ponpandi, Zhang Zhang, Akhilesh Tyagi:
PolyNOC - A polymorphic thread simulator for NoC communication based embedded systems. ReConFig 2013: 1-8 - 2012
- [c52]Jungmin Park, Akhilesh Tyagi:
t-Private logic synthesis on FPGAs. HOST 2012: 63-68 - [c51]Mahadevan Gomathisankaran, Akhilesh Tyagi:
A Novel Design of Secure and Private Circuits. ISVLSI 2012: 362-367 - 2011
- [c50]Viswanath Krishnamurthy, Swamy D. Ponpandi, Akhilesh Tyagi:
A novel thread scheduler design for polymorphic embedded systems. CASES 2011: 75-84 - [c49]Mahadevan Gomathisankaran, Akhilesh Tyagi, Kamesh Namuduri:
HORNS: A homomorphic encryption scheme for Cloud Computing using Residue Number System. CISS 2011: 1-5 - [c48]Swamy D. Ponpandi, Akhilesh Tyagi:
Partial reconfiguration logic synthesis by temporal slicing. FPT 2011: 1-6 - 2010
- [j14]Alex Baumgarten, Akhilesh Tyagi, Joseph Zambreno:
Preventing IC Piracy Using Reconfigurable Logic Barriers. IEEE Des. Test Comput. 27(1): 66-75 (2010) - [j13]Ka-Ming Keung, Akhilesh Tyagi:
State Space Reconfigurability: A Low Energy Implementation Architecture for Self Modifying Finite Automata. J. Low Power Electron. 6(1): 18-31 (2010)
2000 – 2009
- 2009
- [j12]Mahadevan Gomathisankaran, Akhilesh Tyagi:
Relating Boolean gate truth tables to one-way functions. Integr. Comput. Aided Eng. 16(2): 141-150 (2009) - [c47]Ka-Ming Keung, Akhilesh Tyagi:
Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling. NoCArc@MICRO 2009: 11-16 - 2008
- [c46]Ka-Ming Keung, Akhilesh Tyagi:
Self Modifying Finite Automata (SMFA) based state machine implementation for lower energy. ACSCC 2008: 2103-2107 - [c45]Mahadevan Gomathisankaran, Akhilesh Tyagi:
Relating Boolean gate truth tables to one-way functions. EIT 2008: 1-6 - [c44]Mahadevan Gomathisankaran, Ka-Ming Keung, Akhilesh Tyagi:
REBEL - Reconfigurable Block Encryption Logic. SECRYPT 2008: 312-318 - 2007
- [j11]Ka-Ming Keung, Vineela Manne, Akhilesh Tyagi:
A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump. IEEE Trans. Very Large Scale Integr. Syst. 15(7): 733-745 (2007) - 2006
- [j10]Mahadevan Gomathisankaran, Akhilesh Tyagi:
WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays. J. Low Power Electron. 2(3): 388-400 (2006) - [j9]Mahadevan Gomathisankaran, Akhilesh Tyagi:
Architecture Support for 3D Obfuscation. IEEE Trans. Computers 55(5): 497-507 (2006) - [c43]Ka-Ming Keung, Akhilesh Tyagi:
State space reconfigurability: an implementation architecture for self modifying finite automata. CASES 2006: 83-92 - [c42]Ka-Ming Keung, Akhilesh Tyagi:
SRAM CP: A Charge Recycling Design Schema for SRAM. PATMOS 2006: 95-106 - 2005
- [c41]Pramod Ramarao, Akhilesh Tyagi:
An Integrated Partitioning and Scheduling Based Branch Decoupling. Asia-Pacific Computer Systems Architecture Conference 2005: 252-268 - [c40]Jun Ge, Soma Chaudhuri, Akhilesh Tyagi:
Control flow based obfuscation. Digital Rights Management Workshop 2005: 83-92 - [c39]Mahadevan Gomathisankaran, Akhilesh Tyagi:
TIVA: Trusted Integrity Verification Architecture. DRMTICS 2005: 13-31 - [c38]Brian Blietz, Akhilesh Tyagi:
Software Tamper Resistance Through Dynamic Program Monitoring. DRMTICS 2005: 146-163 - [c37]Mahadevan Gomathisankaran, Akhilesh Tyagi:
Arc3D: A 3D Obfuscation Architecture. HiPEAC 2005: 184-199 - [c36]Akhilesh Tyagi:
Energy-Privacy Trade-Offs in VLSI Computations. INDOCRYPT 2005: 361-374 - 2004
- [c35]Sriram Nadathur, Akhilesh Tyagi:
IPC Driven Dynamic Associative Cache Architecture for Low Energy. ICCD 2004: 472-479 - [c34]Mahadevan Gomathisankaran, Akhilesh Tyagi:
WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays. ISVLSI 2004: 105-114 - [c33]Ge Zhu, Akhilesh Tyagi:
Protection against Indirect Overflow Attacks on Pointers. IWIA 2004: 97-106 - 2003
- [j8]Sonal Pandey, Arun K. Somani, Akhilesh Tyagi:
Intermediate processing protocol for processing within IP-routed networks. Microprocess. Microsystems 27(5-6): 285-295 (2003) - [c32]Pramod Ramarao, Akhilesh Tyagi:
An Adiabatic Framework for a Low Energy µ-Architecture & Compiler. Interaction between Compilers and Computer Architectures 2003: 65-74 - [c31]Sriram Nadathur, Akhilesh Tyagi:
A Dependence Driven Efficient Dispatch Scheme. ICCD 2003: 299-306 - [c30]Pramod Ramarao, Akhilesh Tyagi, Gyungho Lee:
Run-Time Support for Detection of Memory Access Violations to Prevent Buffer Overflow Exploits. ISC 2003: 366-380 - [c29]Vineela Manne, Akhilesh Tyagi:
An Adiabatic Charge Pump Based Charge Recycling Design Style. PATMOS 2003: 299-308 - 2002
- [c28]Sonal Pandey, Arun K. Somani, Akhilesh Tyagi:
A reliable protocol for processing within IP-routed networks. ICCCN 2002: 84-89 - [c27]Huesung Kim, Arun K. Somani, Akhilesh Tyagi:
Adaptive Balanced Computing (ABC) Microprocessor Using Reconfigurable Functional Caches (RFCs). ICCD 2002: 138-144 - 2001
- [j7]Huesung Kim, Arun K. Somani, Akhilesh Tyagi:
A reconfigurable multifunction computing cache architecture. IEEE Trans. Very Large Scale Integr. Syst. 9(4): 509-523 (2001) - [j6]Akhilesh Tyagi:
Integrated Area-power Optimal State Assignment. VLSI Design 12(2): 275-300 (2001) - [c26]Abhishek Singhal, Arun K. Somani, Akhilesh Tyagi:
Evaluation of Reconfigurable Cache Module Architecture. FCCM 2001: 263-266 - [c25]Vadhiraj Sankaranarayanan, Akhilesh Tyagi:
A Hierarchical Dependence Check and Folded Rename Mapping Based Scalable Dispatch Stage. ICCD 2001: 249-255 - 2000
- [j5]Akhilesh Tyagi, Gyungho Lee:
A compiler optimization paradigm for dynamic energy management. SIGARCH Comput. Archit. News 28(1): 72-76 (2000) - [c24]Huesung Kim, Arun K. Somani, Akhilesh Tyagi:
A reconfigurable multi-function computing cache architecture. FPGA 2000: 85-94 - [c23]Gyungho Lee, Akhilesh Tyagi:
Encoded Program Counter: Self-Protection from Buffer Overflow Attacks. International Conference on Internet Computing 2000: 387-394 - [c22]Anshuman S. Nadkarni, Akhilesh Tyagi:
A Trace Based Evaluation of Speculative Branch Decoupling. ICCD 2000: 300-307 - [c21]Gyungho Lee, Akhilesh Tyagi:
Instruction-level Distributed Microarchitecture Based on Data Decoupling. PDPTA 2000
1990 – 1999
- 1999
- [c20]Deepali Deshpande, Arun K. Somani, Akhilesh Tyagi:
Hybrid Data/Configuration Caching for Striped FPGAs. FCCM 1999: 294-295 - [c19]Huesung Kim, Arun K. Somani, Akhilesh Tyagi:
On Reconfiguring Cache for Computing. FCCM 1999: 296-297 - [c18]Deepali Deshpande, Arun K. Somani, Akhilesh Tyagi:
Configuration Caching Vs Data Caching for Striped FPGAs. FPGA 1999: 206-214 - [c17]Akhilesh Tyagi, Hon-Chi Ng, Prasant Mohapatra:
Dynamic Branch Decoupled Architecture. ICCD 1999: 442- - 1998
- [j4]M. K. Kidambi, Akhilesh Tyagi, Mohammed R. Madani, Magdy A. Bayoumi:
Three-dimensional defect sensitivity modeling for open circuits in ULSI structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(4): 366-371 (1998) - 1997
- [j3]Akhilesh Tyagi:
Statistical Module Level Area and Delay Estimation. VLSI Design 5(2): 141-153 (1997) - [c16]Prasoon Surti, Liang-Fang Chao, Akhilesh Tyagi:
Low power FSM design using Huffman-style encoding. ED&TC 1997: 521-525 - [c15]Glenn Holt, Akhilesh Tyagi:
Minimizing interconnect energy through integrated low-power placement and combinational logic synthesis. ISPD 1997: 48-53 - 1996
- [c14]Akhilesh Tyagi:
Entropic bounds on FSM switching. ISLPED 1996: 323-328 - 1995
- [c13]Glenn Holt, Akhilesh Tyagi:
EPNR: an energy-efficient automated layout synthesis package. ICCD 1995: 224-229 - [c12]Vamshi Veeramachaneni, Akhilesh Tyagi, Suresh Rajgopal:
Re-encoding for low power state assignment of FSMs. ISLPD 1995: 173-178 - 1994
- [c11]M. K. Kidambi, Akhilesh Tyagi, Mohammed R. Madani, Magdy A. Bayoumi:
Parameterized Modeling of Open-Circuit Critical Volume for Three-Dimensional Defects in VLSI Processing. VLSI Design 1994: 333-338 - 1993
- [j2]Akhilesh Tyagi:
A Reduced-Area Scheme for Carry-Select Adders. IEEE Trans. Computers 42(10): 1163-1170 (1993) - [c10]H. Kumar, Magdy A. Bayoumi, Akhilesh Tyagi, Nam Ling, R. Kalyan:
Parallel Implementation of a Cut and Paste Maze Routing Algorithm. ISCAS 1993: 2035-2038 - [c9]Akhilesh Tyagi:
A Module Generator Development Environment: Area Estimation and Design-Space Exploration Encapsulation. VLSI Design 1993: 214-217 - 1992
- [j1]Akhilesh Tyagi, Magdy A. Bayoumi:
Image segmentation on a 2D array by a directed split and merge procedure. IEEE Trans. Signal Process. 40(11): 2804-2813 (1992) - [c8]Akhilesh Tyagi:
VLSI design parsing (preliminary version). ICCAD 1992: 30-34 - 1991
- [c7]Suresh Rajgopal, Akhilesh Tyagi:
On probabilistic switch-level simulation for asynchronous circuits. EURO-DAC 1991: 339-343 - 1990
- [c6]Akhilesh Tyagi:
An algebraic model for design space with applications to function module generation. EURO-DAC 1990: 114-118 - [c5]John H. Reif, Akhilesh Tyagi:
Efficient Parallel Algorithms for Optical Computing with the DFT Primitive. FSTTCS 1990: 149-160 - [c4]Akhilesh Tyagi:
A reduced area scheme for carry-select adders. ICCD 1990: 255-258 - [c3]Arun Rajanala, Akhilesh Tyagi:
An area estimation technique for module generation. ICCD 1990: 459-462 - [c2]Akhilesh Tyagi, John H. Reif:
Energy complexity of optical computations. SPDP 1990: 14-21
1980 – 1989
- 1989
- [c1]Akhilesh Tyagi:
Energy-Time Trade-offs in VLSI Computation. FSTTCS 1989: 301-311
Coauthor Index
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