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ORCIDHOST 2012: San Francisco, CA, USA
- 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, HOST 2012, San Francisco, CA, USA, June 3-4, 2012. IEEE Computer Society 2012, ISBN 978-1-4673-2341-3
- Matthias Hiller
, Dominik Merli, Frederic Stumpf, Georg Sigl:
Complementary IBS: Application specific error correction for PUFs. 1-6 - Peter Simons, Erik van der Sluis, Vincent van der Leest:
Buskeeper PUFs, a promising alternative to D Flip-Flop PUFs. 7-12 - Jing Ju, Jim Plusquellic, Raj Chakraborty, Reza M. Rad:
Bit string analysis of Physical Unclonable Functions based on resistance variations in metals and transistors. 13-20 - Matthew Lewandowski, Richard Meana, Matthew Morrison, Srinivas Katkoori:
A novel method for watermarking sequential circuits. 21-24 - Mudit Bhargava, Cagla Cakir, Ken Mai:
Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS. 25-30 - Lakshmi Narasimhan Ramakrishnan, Manoj Chakkaravarthy, Antarpreet Singh Manchanda, Mike Borowczak, Ranga Vemuri:
SDMLp: On the use of complementary Pass transistor Logic for design of DPA resistant circuits. 31-36 - Houssem Maghrebi, Sylvain Guilley, Emmanuel Prouff, Jean-Luc Danger:
Register leakage masking using Gray code. 37-42 - Michael Zohner, Marc Stöttinger, Sorin A. Huss, Oliver Stein:
An adaptable, modular, and autonomous side-channel vulnerability evaluator. 43-48 - Michael Bilzor, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin:
Evaluating security requirements in a general-purpose processor by combining assertion checkers with code coverage. 49-54 - Jie Zhang, Haile Yu, Qiang Xu:
HTOutlier: Hardware Trojan detection with side-channel signature outlier identification. 55-58 - Swetha Pappala, Mohammed Y. Niamat, Weiqing Sun:
FPGA based trustworthy authentication technique using Physically Unclonable Functions and artificial intelligence. 59-62 - Jungmin Park, Akhilesh Tyagi:
t-Private logic synthesis on FPGAs. 63-68 - Mohammed M. Farag, Lee W. Lerner, Cameron D. Patterson:
Interacting with Hardware Trojans over a network. 69-74 - Charles Lamech, Jim Plusquellic:
Trojan detection based on delay variations measured using a high-precision, low-overhead embedded test structure. 75-82 - Wenchao Li, Zach Wasson, Sanjit A. Seshia:
Reverse engineering circuits using behavioral pattern mining. 83-88 - Amir Moradi, Oliver Mischke:
Glitch-free implementation of masking in modern FPGAs. 89-95 - Dusko Karaklajic, Junfeng Fan, Ingrid Verbauwhede:
A systematic M safe-error detection in hardware implementations of cryptographic algorithms. 96-101 - Dmitry Nedospasov, Jean-Pierre Seifert, Alexander Schlösser, Susanna Orlic:
Functional integrated circuit analysis. 102-107 - Meng-Day (Mandel) Yu, Richard Sowell, Alok Singh, David M'Raïhi, Srinivas Devadas:
Performance metrics and empirical results of a PUF cryptographic key generation ASIC. 108-115 - Hareesh Khattri, Kumar V. Mangipudi, Salvador Mandujano:
HSDL: A Security Development Lifecycle for hardware technologies. 116-121 - Vladimir Rozic, Wim Dehaene, Ingrid Verbauwhede:
Design solutions for securing SRAM cell against power analysis. 122-127 - Clemens Helfmeier, Christian Boit, Uwe Kerst:
On charge sensors for FIB attack detection. 128-133 - Salvador Manich, Markus S. Wamser, Georg Sigl:
Detection of probing attempts in secure ICs. 134-139 - Jean-Max Dutertre, Amir-Pasha Mirbaha, David Naccache, Anne-Lise Ribotta, Assia Tria, Thierry Vaschalde:
Fault Round Modification Analysis of the advanced encryption standard. 140-145 - Mohamed Saied Emam Mohamed, Stanislav Bulygin, Michael Zohner, Annelie Heuser, Michael Walter, Johannes Buchmann:
Improved algebraic side-channel attack on AES. 146-151
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