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ORCIDMicroprocessors and Microsystems, Volume 16
Volume 16, Number 1, 1992
- Karen Hemingway:
Editorial. 2 - Abdou Youssef, Bruce W. Arden:
Topology of efficiently controllable Banyan multistage networks. 3-13 - Andrea Clematis
, Gabriella Dodero, Vittoria Gianuzzi:
Process checkpointin primitives for fault tolerance: definitions and examples. 15-23 - Emilio Luque, Remo Suppi, Joan Sorribes:
Designing parallel systems: a performance prediction problem. 25-35
Volume 16, Number 2, 1992
- D. S. Gibbs, Edward Ball, Geraldine Calvignac:
A content addressable memory for data communications. 59-66 - Qiang Li, Naphtali Rishe:
CONNECT - an architecture for a highly parallel system based on building blocks. 67-79 - Miomirka Cvijovic, Mojca Kunc:
An approach to the design of distributed real-time operating systems. 81-89 - Alan A. Bertossi, Luigi V. Mancini:
Fault-tolerant LPT task scheduling in multiprocessor systems. 91-99 - John R. Mick:
Introduction to IDT's FourPort RAM. 101-110
Volume 16, Number 3, 1992
- Peter Barrie, Paul Cockshott, George J. Milne, Paul Shaw:
Design and verification of a highly concurrent machine. 115-123 - Olli Vainio, Seppo J. Ovaska:
Real-time AC motor modelling with the TMS320C25 signal processor. 125-131 - Rabin Deka, B. Singh, Ian A. Glover:
A two-pass TMS320C25 for the Motorola EXORMacs. 133-140 - Li-Quan Wang, Noel E. Evans, J. Brian Burns:
A portable data acquisition system for fading evaluation in UHF radio channels. 141-147 - C. P. Ravikumar:
Parallel techniques for solving large scale travelling salesperson problems. 149-158 - Laurie J. Burger:
Board level bus analysers for VMEbus and beyond. 159-162
Volume 16, Number 4, 1992
- Andrzej Florek, Krzysztof Kozlowski, Waldemar Wróblewski, Jacek Gapinski:
Computer-controlled digital correlator and its application in experimental physics. 171-176 - Gabriel Jiménez, José Luis Sevillano, Antón Civit Balcells, Fernando Díaz del Río, Antón Civit-Breu:
RISC-based architectures for multiple robot systems. 177-186 - Arthur Abnous, Christopher Christensen, Jeffrey Gray, John Lenell, Andrew Naylor, Nader Bagherzadeh:
Design and implementation of the 'Tiny RISC' microprocessor. 187-193 - Michael J. Milway:
A serial tram: design and testing. 195-205 - Gordon Doughman:
Use of stack simplifies M68HC11 programming. 207-221
Volume 16, Number 5, 1992
- N. Ranganathan, K. R. Balaji, Hassan N. Srinidhi:
A VLSI systolic array processor chip for computing joins in a relational database. 227-236 - Paul T. Hulina, Lizyamma Kurian, Eugene B. John, Lee D. Coraor:
Design and VLSI implementation of an access processor for a decoupled architecture. 237-247 - Craig B. Stunkel, Bob Janssens, W. Kent Fuchs:
Address tracing of parallel systems via TRAPEDS. 249-261 - Dilip Ranade, Hemalatha Diwakar:
Distributed memory management on a multi-transputer system. 263-268 - Hassan Farhat, Steven G. From:
Bounds on population coverage using test generation by fault sampling. 269-275 - Jim E. Cooling:
Programming languages for the 90s - Where to next? 276-278
Volume 16, Number 6, 1992
- Douglas Thomae, David E. van den Bout:
Automatic circuit partitioning in the Anyboard rapid prototyping system. 283-290 - A. J. Anderson:
A transputer based supervisor for adaptive signal processing. 291-300 - Cruz Izu, Agustin Arruabarrena, Ramón Beivide:
Analysis and evaluation of message management functions for bidimensional transputer networks. 301-309 - G. Premalatha, C. Eswaran:
Personal computer based cardiac monitor. 311-320 - Arun Vaidyanathan, Eric M. Dowling, Poras T. Balsara:
Design and implementation of a multi-microprocessor architecture for image processing. 321-330 - Joe Gallacher:
The Magic of Modula-2: Hopper, K, Holmes, G and Rogers, W Addison-Wesley, Wokingham, UK (1991) £19.95 pp 529, ISBN 0 201 50993 8. 331 - Darrel C. Ince:
Object oriented design with applications: Booch, G Benjamin Cummings, Redwood City, CA, USA (1991) £25.95 pp 58(. 332
Volume 16, Number 7, 1992
- Jonathan Bertoni, Jean-Loup Baer, Wen-Hann Wang:
Scaling shared-bus multiprocessors with multiple buses and shared caches: a performance study. 339-350 - Roberto Battiti, Giampietro Tecchiolli:
Parallel biased search for combinatorial optimization: genetic algorithms and TABU. 351-367 - Jong-Il Kim, Jaehyun Park, Wook Hyun Kwon:
Architecture of a ladder solving processor for programmable controllers. 369-379 - Laurie Burger:
Strategies for testing and monitoring VMEbus installations. 381-385 - Alan Clements:
Field programmable logic and applications: International workshop proceedings: Moore, W R and Luk, W Abingdon EE&CSA Books, Abingdon, UK (1991) ISBN 0-9518453-0-6, £29.95 pp 457. 388 - John Niven:
Testing semiconductor memories, theory and practice: van de Goor, A J John Wiley, Chichester, UK (1991) £34.99 pp 536 ISBN 0 471 92586 1, 0 471 92587 X (disc). 388-389
Volume 16, Number 8, 1992
- Hajime Takakubo, Katsufusa Shono:
An image tracing approach using CMOS variable threshold logic. 395-402 - Nigel M. Allinson, Mike J. Sales:
CART - A cellular automata research tool. 403-415 - Mike L. Devine:
Real time trigonometric function evaluation. 417-425 - Brian Dipert, Don Verner:
Designing an updatable BIOS using flash memory. 427-445
Volume 16, Number 9, 1992
- Jim E. Cooling:
Losing sight of basics? 451-452 - Gerassimos D. Barlas, Gerassimos Frangakis, Emmanuel Skordalakis:
TFGS: a transputer file and graphics system for PC-hosted machines. 453-462 - Emilio L. Zapata, Oscar G. Plata, Francisco F. Rivera:
Design of parallel algorithms for a distributed memory hypercube. 463-470 - Vijay K. Jain, Jeffrey M. Wills, Suhrid A. Wadekar:
Parallel processing architectures for advanced signal processing. 471-479 - Spyros Tragoudas, Fillia Makedon, Robert Farell:
Circuit partitioning into small sets. 481-491 - Chris Hanke, Gary Tharalson:
Low skew clock drivers and their system design considerations. 493-498 - Steve B. Furber:
RISC architectures : Heudin, J C and Panetto, C Chapman & Hall, London, UK (1992) ISBN 0 412 45340 1, £19.95, pp 261. 499
Volume 16, Number 10, 1992
- Eric M. Dowling, Darel A. Linebarger, Yaguang Tong, Michael Muñoz:
An adaptive microphone array processing system. 507-516 - Ganesh Gopalakrishnan, Venkatesh Akella:
VLSI asynchronous systems: specification and synthesis. 517-527 - José Salinas, Fabrizio Lombardi:
A data path approach for testing microprocessors with a fault bound: the MC68000 case. 529-539 - Anthony C. Briers, Alan Clements:
Object-oriented experiences with ERIC. 541-550
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