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ORCIDReCoSoC 2006: Montpellier, France
- Gilles Sassatelli, Leandro Soares Indrusiak, Manfred Glesner, Lionel Torres:
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2006, Montpellier, France, July 2006. Univ. Montpellier II 2006, ISBN 2-9517461-2-1
Session 1. Reconfigurable Architectures
- Claudio Brunelli, Fabio Garzia, Jari Nurmi:
A Coarse-Grain Reconfigurable Machine with Floating-Point Arithmetic Capabilities. ReCoSoC 2006: 1-7 - Alexander Warkentin, Florian Dittmann:
Data Transfer Protocols for a Two Slot Based Reconfigurable Platform. ReCoSoC 2006: 8-15
Session 2. Applications of Reconfigurable Communication-centric SoCs
- Timo Vogt, Christian Neeb, Norbert Wehn:
A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding. ReCoSoC 2006: 16-23 - Alain Greiner, Frédéric Pétrot, M. Carrier, Mounir Benabdenbi, Roselyne Chotin-Avot, Raphaël Labayrade:
MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation. ReCoSoC 2006: 24-30 - Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich:
A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template. ReCoSoC 2006: 31-37
Session 3. Compilation and Programmability
- Alberto Gallini, Alberto Rosti, Sara Bocchio:
Compilation Techniques for Configurable Architectures. ReCoSoC 2006: 38-45 - Carlos Morra, M. Sackmann, Jürgen Becker, Reiner W. Hartenstein:
Using Rewriting Logic to Generate Different Implementations of Polynomial Approximations in Coarse-Grained Architectures. ReCoSoC 2006: 46-51
Session 4. Security Issues in ReCoSoC Platforms
- Nicolas Valette, Lionel Torres, Gilles Sassatelli, S. Bancel:
How to Secure Embedded Programmable Gate Arrays? ReCoSoC 2006: 52-59 - Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet:
Secure Architecture in Embedded Systems: an Overview. ReCoSoC 2006: 60-67 - Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, Albert Martinez:
Efficient Combination of Data Encryption and Integrity Checking for Embedded Systems. ReCoSoC 2006: 69-75
Session 5. Low Power Techniques
- Frank Sill, Claas Cornelius, Stephan Kubisch, Dirk Timmermann:
Mixed Gates: Leakage Reduction techniques applied to Switches for Networks-on-Chip. ReCoSoC 2006: 76-82 - Eric Senn, Nathalie Julien, David Elléouet, Yannig Savary, Nabil Abdelli:
Building and Using System, Algorithmic, and Architectural Power and Energy Models in the FPGA Design. ReCoSoC 2006: 83-90
Session 6. Partial and Dynamic Reconfiguration
- Yana Esteves Krasteva, Eduardo de la Torre, Teresa Riesgo:
Partial Reconfiguration for Core Reallocation and Flexible Communications. ReCoSoC 2006: 91-97 - Nicolas Abel, Lounis Kessal, Sébastien Pillement, Didier Demigny:
Clear Stream towards Dynamically Reconfigurable Systems on Chip. ReCoSoC 2006: 98-104 - Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
A Concept for a Profile-based Dynamic Reconfiguration Mechanism. ReCoSoC 2006: 105-110 - Andreas Kühn, Felix Madlener, Sorin A. Huss:
Resource Management for Dynamic Reconfigurable Hardware Structures. ReCoSoC 2006: 111-116
Session 7. Novel FPGA Architectures
- Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Habib Mehrez, André Tissot:
Performance Improvement of FPGA Using Novel Multilevel Hierarchical Interconnection Structure. ReCoSoC 2006: 117-123 - Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Remanent SRAM Structure for Runtime Reconfigurable FPGA. ReCoSoC 2006: 124-130
Session 8. System Level Design Flows: Open Issues and Case Studies
- Grégory Gailliard, Bertrand Mercier, Michel Sarlotte, Bernard Candaele, François Verdier:
Towards a SystemC TLM based Methodology for Platform Design and IP Reuse: Application to Software Defined Radio. ReCoSoC 2006: 131-138 - C. A. DeJuan-Esteban, Alfredo Rosado Muñoz, Emilio Soria-Olivas, Manuel Bataller-Mompeán, Juan Guerrero-Martínez:
An approach to Co-design of Complex Adaptive Systems. ReCoSoC 2006: 139-145 - Gert Jervan, Anton Arhipov, Peeter Ellervee:
Work in Progress: FPGA Based Emulation Environment. ReCoSoC 2006: 146-151 - Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel:
Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. ReCoSoC 2006: 152-159
Session 9. Exploring Parallelism in ReCoSoC Platforms
- Hua Zhong, Leandro Soares Indrusiak, Heiko Hinkelmann, Manfred Glesner:
Exploring Functional Unit Parallelism in Reconfigurable Computing Platforms. ReCoSoC 2006: 160-167 - Stéphane Chevobbe, Raphaël David, Frédéric Blanc, Thierry Collette, Olivier Sentieys:
Control Unit for Parallel Embedded System. ReCoSoC 2006: 168-176
Session 10. Applications in Image Processing and Telecom
- Jérôme Dubois, Dominique Ginhac, Michel Paindavoine:
Design of a 10000 Frames/s CMOS Sensor with In Situ Image Processing. ReCoSoC 2006: 177-182 - Kurt Franz Ackermann, Friedhelm Mayer, Leandro Soares Indrusiak, Manfred Glesner:
Adaptable Image Processing System based on FPGA Modular Multi Kernel Instantiations. ReCoSoC 2006: 183-188 - Barthélémy Heyrman, Michel Paindavoine:
SystemC design of a smart camera. ReCoSoC 2006: 189-193 - Diego Puschini, Fabien Clermidy:
A Comparison between NoC and Bus Architectures Based on a Real-Application. ReCoSoC 2006: 194-200 - Vincent Brost, Fan Yang, Michel Paindavoine:
Embedded System Prototyping Experience Using Multi-DSPs VHDL Model. ReCoSoC 2006: 201-206
Posters
- Jehangir Khan, Yassin Elhillali, Smaïl Niar, Atika Rivenq:
A Low Speed Digital Correlator Architecture Optimized For Resource Savings. ReCoSoC 2006: 207-213 - Pascal Manet, Jean-Baptiste Rigaud, Julien Francq, Marc Jeambrun, Assia Tria, Bruno Robisson, Jerome Quartana, Selma Laabidi:
Integrated Evaluation Platform for Secured Devices. ReCoSoC 2006: 214-219 - Benoît Badrignans, Daniel Mesquita, Jean-Claude Bajard, Lionel Torres, Gilles Sassatelli, Michel Robert:
A Parallel and Secure Architecture for Asymmetric Cryptography. ReCoSoC 2006: 220-224 - Jan Borgosz:
FPGA Implementation of a Digital Jitter Measurement Method for SDH Data Streams. ReCoSoC 2006: 225-231 - Yaseer Arafat Durrani, Teresa Riesgo:
Power Macromodeling for High Level Power Estimation. ReCoSoC 2006: 232-236 - Etienne Faure, Alain Greiner, Daniela Genius:
A generic hardware/software communication mechanism for Multi-Processor System on Chip, Targeting Telecommunication Applications. ReCoSoC 2006: 237-242 - Viktor Fischer, Lionel Torres, Daniel Mesquita:
Flexible security and its technology limits. ReCoSoC 2006: 243-248
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