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Publication search results
found 16 matches
- 2017
- Achira Pal, Atal Chaudhuri
, Rajat Kumar Pal, Alak Kumar Datta:
Hardness of crosstalk minimization in two-layer channel routing. Integr. 56: 139-147 (2017) - Jun Chen, Benqing Guo, Boyang Zhang, Guangjun Wen:
An inductorless wideband common-gate LNA with dual capacitor cross-coupled feedback and negative impedance techniques. Integr. 56: 53-60 (2017) - Aijiao Cui, Yanhui Luo, Huawei Li, Gang Qu:
Why current secure scan designs fail and how to fix them? Integr. 56: 105-114 (2017) - Maryam Dehbashian, Mohammad Maymandi-Nejad:
A new hybrid algorithm for analog ICs optimization based on the shrinking circles technique. Integr. 56: 148-166 (2017) - Aiman H. El-Maleh
:
A probabilistic pairwise swap search state assignment algorithm for sequential circuit optimization. Integr. 56: 32-43 (2017) - Rickard Ewetz, Cheng-Kok Koh:
Fast clock scheduling and an application to clock tree synthesis. Integr. 56: 115-127 (2017) - Jonathan Frey, Qiaoyan Yu:
A hardened network-on-chip design using runtime hardware Trojan mitigation methods. Integr. 56: 15-31 (2017) - Xinfei Guo
, Mircea R. Stan
:
Implications of accelerated self-healing as a key design knob for cross-layer resilience. Integr. 56: 167-180 (2017) - Patrick W. C. Ho, Haider Abbas F. Almurib
, T. Nandha Kumar:
Configurable memristive logic block for memristive-based FPGA architectures. Integr. 56: 61-69 (2017) - Milad Kaboli, Behzad Ghanavati, Majid Akhlaghi:
A new CMOS pseudo approximation exponential function generator by modified particle swarm optimization algorithm. Integr. 56: 70-76 (2017) - Joohan Kim, Taewhan Kim:
Boundary optimization of buffered clock trees for low power. Integr. 56: 86-95 (2017) - Tao Liu, Hui Guo, Sri Parameswaran
, Xiaobo Sharon Hu
:
iCETD: An improved tag generation design for memory data authentication in embedded processor systems. Integr. 56: 96-104 (2017) - Jubin Mitra, Tapan Kumar Nayak:
Reconfigurable very high throughput low latency VLSI (FPGA) design architecture of CRC 32. Integr. 56: 1-14 (2017) - George K. Papakonstantinou:
Exclusive or Sum of Complex Terms expressions minimization. Integr. 56: 44-52 (2017) - Mohsen Shahghasemi, Mohammad Yavari
:
MASH ΣΔ modulators with a noise-shaped two-step ADC in the second stage. Integr. 56: 77-85 (2017) - Samin Ebrahim Sorkhabi, Lihong Zhang:
Automated topology synthesis of analog and RF integrated circuits: A survey. Integr. 56: 128-138 (2017)
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