• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 28 matches

• 2012
• 
  Nico Adler, Martin Hillenbrand, Klaus D. Müller-Glaser, Eduard Metzker, Clemens Reichmann:
  Graphically notated fault modeling and safety analysis in the context of electric and electronic architecture development and functional safety. RSP 2012: 36-42
• 
  Alexandra Aguiar, Carlos Moratelli, Marcos Sartori, Fabiano Hessel:
  Hardware-assisted virtualization targeting MIPS-based SoCs. RSP 2012: 2-8
• 
  Ihsen Alouani, Smaïl Niar, Fadi J. Kurdahi, Mohamed Abid:
  Parity-based mono-Copy Cache for low power consumption and high reliability. RSP 2012: 44-48
• 
  Olivier Bouissou, Samuel Mimram, Alexandre Chapoutot:
  HySon: Set-based simulation of hybrid systems. RSP 2012: 79-85
• 
  Anup Das, Akash Kumar:
  Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs. RSP 2012: 149-155
• 
  Nikil D. Dutt:
  Keynote speach. RSP 2012
• 
  Christian Fotsing, Annie Geniet:
  Integrating semantic properties within a Petri net based scheduling tool. RSP 2012: 93-99
• 
  Virginie Fresse, Zhiwei Ge, Junyan Tan, Frédéric Rousseau:
  Case study: Deployment of the 2D NoC on 3D for the generation of large emulation platforms. RSP 2012: 23-29
• 
  Yan Ghidini, Thais Webber, Edson I. Moreno, Fernando Grando, Rubem Dutra Ribeiro Fagundes, César A. M. Marcon:
  Buffer depth and traffic influence on 3D NoCs performance. RSP 2012: 9-15
• 
  Ian Gray, Neil C. Audsley:
  Challenges in software development for multicore System-on-Chip development. RSP 2012: 115-121
• 
  Marcelo Guedes, Rafael Auler, Edson Borin, Rodolfo Azevedo:
  An ArchC approach for automatic energy consumption characterization of processors. RSP 2012: 57-63
• 
  Jiashu Li, Anup Das, Akash Kumar:
  A design flow for partially reconfigurable heterogeneous multi-processor platforms. RSP 2012: 170-176
• 
  BaekGyu Kim, Linh T. X. Phan, Insup Lee, Oleg Sokolsky:
  A model-based I/O interface synthesis framework for the cross-platform software modeling. RSP 2012: 16-22
• 
  Sofiane Lagraa, Alexandre Termier, Frédéric Pétrot:
  Automatic congestion detection in MPSoC programs using data mining on simulation traces. RSP 2012: 64-70
• 
  Sungjin Lee, Jisung Park, Jihong Kim:
  FlashBench: A workbench for a rapid development of flash-based storage devices. RSP 2012: 163-169
• 
  Philipp Mahr, Christophe Bobda:
  Reducing communication costs on Dynamic Networks-on-Chip through runtime relocation of tasks. RSP 2012: 177-182
• 
  Frédéric Mallet:
  Automatic generation of observers from MARTE/CCSL. RSP 2012: 86-92
• 
  Purushotham Murugappa, Jean-Noel Bazin, Amer Baghdadi, Michel Jézéquel:
  FPGA prototyping and performance evaluation of multi-standard Turbo/LDPC Encoding and Decoding. RSP 2012: 143-148
• 
  Konstantin Nasartschuk, Rainer Herpers, Kenneth B. Kent:
  Visualization support for FPGA architecture exploration. RSP 2012: 128-134
• 
  Hai H. Nguyen, Mikael Guillemot, Yvon Savaria, Yves Blaquière:
  A new approach for pin detection for an electronic system prototyping reconfigurable platform. RSP 2012: 122-127
• 
  Gilberto Ochoa-Ruiz, Ouassila Labbani, El-Bay Bourennane, Sana Cherif, Samy Meftali, Jean-Luc Dekeyser:
  Enabling partially reconfigurable IP cores parameterisation and integration using MARTE and IP-XACT. RSP 2012: 107-113
• 
  Carlos A. Petry, Eduardo Wächter, Guilherme M. Castilhos, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
  A spectrum of MPSoC models for design space exploration and its use. RSP 2012: 30-35
• 
  Diego Puschini, Julien Mottin, Nicolas Palix, Lian Apostol, Christian Fabre:
  Integrated architecture exploration workflow: A NoC-based case study. RSP 2012: 135-141
• 
  Nuno Roma, Pedro Magalhães:
  System-level prototyping framework for heterogeneous multi-core architecture applied to biological sequence analysis. RSP 2012: 156-162
• 
  Tobias Schwalb, Tobias Gädeke, Johannes Schmid, Klaus D. Müller-Glaser:
  Seamless model-based design and deployment of wireless networked systems. RSP 2012: 100-106
• 
  Qingshan Tang, Habib Mehrez, Matthieu Tuna:
  Design for prototyping of a parameterizable cluster-based Multi-Core System-on-Chip on a multi-FPGA board. RSP 2012: 71-77
• 
  Dukyoung Yun, Youngmin Yi, Sungchan Kim, Soonhoi Ha:
  A cycle-level parallel simulation technique exploiting both space and time parallelism. RSP 2012: 50-56
• 
  Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, RSP 2012, Tampere, Finland, October 11-12, 2012. IEEE 2012, ISBN 978-1-4673-2786-2 [contents]