• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 16 matches

• 2017
• 
  Binod Kumar, Kanad Basu, Masahiro Fujita, Virendra Singh:
  RTL level trace signal selection and coverage estimation during post-silicon validation. HLDVT 2017: 59-66
• 
  Maral Amir, Tony Givargis:
  HES machine: Harmonic equivalent state machine modeling for cyber-physical systems. HLDVT 2017: 31-38
• 
  Sophia Balkovski, Ian G. Harris:
  Designing cyber-physical systems from natural language descriptions. HLDVT 2017: 39-44
• 
  Guy Barash, Eitan Farchi:
  A randomized algorithm for constructing cross-feature tests from single feature tests. HLDVT 2017: 1-8
• 
  Zhongqi Cheng, Tim Schmidt, Guantao Liu, Rainer Dömer:
  Thread- and data-level parallel simulation in SystemC, a Bitcoin miner case study. HLDVT 2017: 74-81
• 
  Florenc Demrozi, Riccardo Zucchelli, Graziano Pravadelli:
  Exploiting sub-graph isomorphism and probabilistic neural networks for the detection of hardware Trojans at RTL. HLDVT 2017: 67-73
• 
  Keerthikumara Devarajegowda, Wolfgang Ecker:
  On generation of properties from specification. HLDVT 2017: 95-98
• 
  Masahiro Fujita:
  An approach to approximate computing: Logic transformations for one-minterm changes in specification. HLDVT 2017: 91-94
• 
  Michele Lora:
  Validation of HMI applications for industrial smart display. HLDVT 2017: 23-30
• 
  Siroos Madani, Kasem Khalil, Bappaditya Dey, Devante Bonton, Magdy A. Bayoumi:
  Repair techniques for aged TSVs in 3D integrated circuits. HLDVT 2017: 53-58
• 
  Pankaj Moharikar, Jayakrishna Guddeti:
  Automated test generation for post silicon microcontroller validation. HLDVT 2017: 45-52
• 
  Tonmoy Roy, Michael Hsiao:
  Reachability analysis in RTL circuits using k-induction bounded model checking. HLDVT 2017: 9-16
• 
  Zahra Shirmohammadi, Hadi Zamani Sabzi, Seyed Ghassem Miremadi:
  3D-DyCAC: Dynamic numerical-based mechanism for reducing crosstalk faults in 3D ICs. HLDVT 2017: 87-90
• 
  Daniela De Venuto, Giovanni Mezzina, V. L. Gallo:
  Design and implementation of FPGA-based muscle conduction velocity tracker in dynamic contractions during the gait. HLDVT 2017: 82-86
• 
  Farzaneh Zokaee, Hossein Sabaghian Bidgoli, Vahid Janfaza, Payman Behnam, Zainalabedin Navabi:
  A novel SAT-based ATPG approach for transition delay faults. HLDVT 2017: 17-22
• 
  2017 IEEE International High Level Design Validation and Test Workshop, HLDVT 2017, Santa Cruz, CA, USA, October 5-6, 2017. IEEE Computer Society 2017, ISBN 978-1-5090-3997-5 [contents]