• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 31 matches

• 2004
• 
  Mark D. Aagaard, Vlad C. Ciubotariu, Jason T. Higgins, Farzad Khalvati:
  Combining Equivalence Verification and Completion Functions. FMCAD 2004: 98-112
• 
  Mark D. Aagaard, Nancy A. Day, Robert B. Jones:
  Synchronization-at-Retirement for Pipeline Verification. FMCAD 2004: 113-127
• 
  Behzad Akbarpour, Sofiène Tahar:
  A Methodology for the Formal Verification of FFT Algorithms in HOL. FMCAD 2004: 37-51
• 
  Nina Amla, Kenneth L. McMillan:
  A Hybrid of Counterexample-Based and Proof-Based Abstraction. FMCAD 2004: 260-274
• 
  Laurent Arditi, Gérard Berry, Michael Kishinevsky:
  Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs. FMCAD 2004: 128-143
• 
  Mohammad Awedh, Fabio Somenzi:
  Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States. FMCAD 2004: 230-244
• 
  Lubos Brim, Ivana Cerná, Pavel Moravec, Jirí Simsa:
  Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking. FMCAD 2004: 352-366
• 
  Ching-Tsun Chou, Phanindra K. Mannava, Seungjoon Park:
  A Simple Method for Parameterized Verification of Cache Coherence Protocols. FMCAD 2004: 382-398
• 
  Alessandro Cimatti, Marco Roveri, Daniel Sheridan:
  Bounded Verification of Past LTL. FMCAD 2004: 245-259
• 
  Koen Claessen, Johan Mårtensson:
  An Operational Semantics for Weak PSL. FMCAD 2004: 337-351
• 
  Thao Dang, Alexandre Donzé, Oded Maler:
  Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques. FMCAD 2004: 21-36
• 
  Peter C. Dillinger, Panagiotis Manolios:
  Bloom Filters in Probabilistic Verification. FMCAD 2004: 367-381
• 
  Enrico Giunchiglia, Massimo Narizzano, Armando Tacchella:
  QuBE++: An Efficient QBF Solver. FMCAD 2004: 201-213
• 
  Orna Grumberg, Assaf Schuster, Avi Yadgar:
  Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis. FMCAD 2004: 275-289
• 
  Arie Gurfinkel, Marsha Chechik:
  Extending Extended Vacuity. FMCAD 2004: 306-321
• 
  Timo Latvala, Armin Biere, Keijo Heljanko, Tommi A. Junttila:
  Simple Bounded LTL Model Checking. FMCAD 2004: 186-200
• 
  Panagiotis Manolios, Daron Vroon:
  Integrating Reasoning About Ordinal Arithmetic into ACL2. FMCAD 2004: 82-97
• 
  Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman, Andreas Kuehlmann:
  Scalable Automated Verification via Expert-System Guided Transformations. FMCAD 2004: 159-173
• 
  In-Ho Moon, Carl Pixley:
  Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders. FMCAD 2004: 144-158
• 
  Tobias Nopper, Christoph Scholl:
  Approximate Symbolic Model Checking for Incomplete Designs. FMCAD 2004: 290-305
• 
  Giuseppe Della Penna, Benedetto Intrigila, Igor Melatti, Enrico Tronci, Marisa Venturini Zilli:
  Bounded Probabilistic Model Checking with the Muralpha Verifier. FMCAD 2004: 214-229
• 
  Sandip Ray, J Strother Moore:
  Proof Styles in Operational Semantics. FMCAD 2004: 67-81
• 
  Debashis Sahoo, Subramanian K. Iyer, Jawahar Jain, Christian Stangier, Amit Narayan, David L. Dill, E. Allen Emerson:
  A Partitioning Methodology for BDD-Based Verification. FMCAD 2004: 399-413
• 
  Marko Samer, Helmut Veith:
  Parameterized Vacuity. FMCAD 2004: 322-336
• 
  Julien Schmaltz, Dominique Borrione:
  A Functional Approach to the Formal Specification of Networks on Chip. FMCAD 2004: 52-66
• 
  Mary Sheeran:
  Generating Fast Multipliers Using Clever Circuits. FMCAD 2004: 6-20
• 
  Christian Stangier, Thomas Sidle:
  Invariant Checking Combining Forward and Backward Traversal. FMCAD 2004: 414-429
• 
  Wayne H. Wolf:
  Challenges in System-Level Design. FMCAD 2004: 1-5
• 
  Zijiang Yang, Rajeev Alur:
  Variable Reuse for Efficient Image Computation. FMCAD 2004: 430-444
• 
  Emmanuel Zarpas:
  Simple Yet Efficient Improvements of SAT Based Bounded Model Checking. FMCAD 2004: 174-185

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