- S. E. Kim, T. W. Kang, S. W. Kang, K. H. Park, M. A. Chung:
High-efficiency voltage regulation stage in energy harvesting systems. VLSI-SoC 2015: 237-240 - Jae-Jin Lee, Chan Kim, Kyungjin Byun, Nak-Woong Eum:
Virtual prototype based on Aldebarn CPU core. VLSI-SoC 2015: 303-306 - Jaemin Lee, Seungwon Kim, Youngmin Kim, Seokhyeong Kang:
An optimal operating point by using error monitoring circuits with an error-resilient technique. VLSI-SoC 2015: 69-73 - Zheng Li, Chenchen Liu, Yandan Wang, Bonan Yan, Chaofei Yang, Jianlei Yang, Hai Li:
An overview on memristor crossabr based neuromorphic circuit and architecture. VLSI-SoC 2015: 52-56 - Jing-Jia Liou, Meng-Ta Hsieh, Jun-Fei Cherng, Harry H. Chen:
Cost reduction of system-level tests with stressed structural tests and SVM. VLSI-SoC 2015: 177-182 - Qiong Wei Low, Liter Siek, Mi Zhou:
A high efficiency rectifier for inductively power transfer application. VLSI-SoC 2015: 270-273 - Dominik Macko, Katarína Jelemenská, Pavel Cicák:
Power-management high-level synthesis. VLSI-SoC 2015: 63-68 - Shahzad Muzaffar, Ibrahim M. Elfadel:
Timing and robustness analysis of Pulsed-Index protocols for single-channel IoT communications. VLSI-SoC 2015: 225-230 - Pierre Nicolas-Nicolaz, Kiyoung Choi:
Dynamic error tracking and supply voltage adjustment for low power. VLSI-SoC 2015: 74-79 - Manikandan Pandiyan, Geetha Mani:
Embedded low power analog CMOS Fuzzy Logic Controller chip for industrial applications. VLSI-SoC 2015: 43-48 - Manikandan Pandiyan, Geetha Mani, Jovitha Jerome, Natarajan S.:
Integrating wearable low power CMOS ECG acquisition SoC with decision making system for WSBN applications. VLSI-SoC 2015: 154-158 - Hyunsun Park, Junwhan Ahn, Eunhyeok Park, Sungjoo Yoo:
Locality-aware vertex scheduling for GPU-based graph computation. VLSI-SoC 2015: 195-200 - Seongmo Park, Kyungjin Byun, Nak-Woong Eum:
A hybrid embedded compression codec engine for ultra HD video application. VLSI-SoC 2015: 292-296 - Hyunsun Park, Chanha Kim, Sungjoo Yoo, Chanik Park:
Filtering dirty data in DRAM to reduce PRAM writes. VLSI-SoC 2015: 319-324 - Hyungil Park, Ingi Lim, Sungweon Kang, Whan-woo Kim:
10Mbps human body communication SoC for BAN. VLSI-SoC 2015: 149-153 - Jaehyun Park, Donghwa Shin, Hyung Gyu Lee:
Prefetch-based dynamic row buffer management for LPDDR2-NVM devices. VLSI-SoC 2015: 98-103 - Jaehyun Park, Donghwa Shin, Hyung Gyu Lee:
Design space exploration of row buffer architecture for phase change memory with LPDDR2-NVM interface. VLSI-SoC 2015: 104-109 - Ananthanarayanan Parthasarathy:
Design and analysis of search algorithms for lower power consumption and faster convergence of DAC input of SAR-ADC in 65nm CMOS. VLSI-SoC 2015: 274-279 - Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay:
Flare reduction in EUV Lithography by perturbation of wire segments. VLSI-SoC 2015: 7-12 - Artur Quiring, Markus Olbrich, Erich Barke:
Fast global interconnnect driven 3D floorplanning. VLSI-SoC 2015: 313-318 - Zoltán Endre Rákossy, Dominik Stengele, Gerd Ascheid, Rainer Leupers, Anupam Chattopadhyay:
Exploiting scalable CGRA mapping of LU for energy efficiency using the Layers architecture. VLSI-SoC 2015: 337-342 - Surajit Kumar Roy, Supriyo Mandal, Chandan Giri, Hafizur Rahaman:
A thermal estimation model for 3D IC using liquid cooled microchannels and thermal TSVs. VLSI-SoC 2015: 122-127 - Samah Mohamed Saeed, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu:
Timing attack on NEMS relay based design of AES. VLSI-SoC 2015: 264-269 - Jae-sun Seo, Mingoo Seok:
Digital CMOS neuromorphic processor design featuring unsupervised online learning. VLSI-SoC 2015: 49-51 - Kerem Seyid, Sebastien Blanc, Yusuf Leblebici:
Hardware implementation of real-time multiple frame super-resolution. VLSI-SoC 2015: 219-224 - Seongbo Shim, Youngsoo Shin:
Physical design and mask optimization for directed self-assembly lithography (DSAL). VLSI-SoC 2015: 80-85 - Youngsoo Shin, Chi-Ying Tsui:
Message from the technical program chairs. VLSI-SoC 2015: IX - Manikantan Srinivasan, C. Siva Ram Murthy, Anusuya Balasubramanian:
Modular performance analysis of Multicore SoC-based small cell LTE base station. VLSI-SoC 2015: 37-42 - Jia Wei Tang, Yuan Wen Hau, Muhammad N. Marsono:
Hardware/software partitioning of embedded System-on-Chip applications. VLSI-SoC 2015: 331-336 - Chun-Jen Tsai, Tsung-Han Wu, Hung-Cheng Su:
JAIP-MP: A four-core Java application processor. VLSI-SoC 2015: 189-194