- Guillaume Patrigeon
, Pascal Benoit, Lionel Torres:
FPGA-Based Platform for Fast Accurate Evaluation of Ultra Low Power SoC. PATMOS 2018: 123-128 - Himadri Singh Raghav, Vivian A. Bartlett, Izzet Kale:
Symmetric Power Analysis Attack Resilient Adiabatic Logic for Smartcard Applications. PATMOS 2018: 39-45 - Filip Segmanovic, Frederic Roger, Gerald Meinhard, Ingrid Jonak-Auer, Tomislav Suligoj:
Optical and Electrical Simulations of Radiation-Hard Photodiode in 0.35μM High-Voltage CMOS Technology. PATMOS 2018: 92-96 - Roberto Sierra, Carlos Carreras, Gabriel Caffarena:
Automated Timing Characterization of High-Performance Macroblocks for Latency Insensitive FPGA Designs. PATMOS 2018: 7-12 - Erik S. Skibinsky-Gitlin, Miquel L. Alomar, Eugeni Isern, Miquel Roca, Vincent Canals, Josep L. Rosselló:
Reservoir Computing Hardware for Time Series Forecasting. PATMOS 2018: 133-139 - Erica Tena-Sánchez, Antonio J. Acosta:
Effect of Temperature Variation in Experimental DPA and DEMA Attacks. PATMOS 2018: 163-168 - Thomas Vandenabeele, Roel Uytterhoeven, Wim Dehaene, Nele Mentens:
A Systematic Performance Comparison of Ultra Low-Power AES S-Boxes. PATMOS 2018: 248-253 - Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera:
Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure. PATMOS 2018: 237-242 - Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris:
Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs. PATMOS 2018: 229-236 - Yi Zhao, Cong Hao, Takeshi Yoshimura:
TSV Assignment of Thermal and Wirelength Optimization for 3D-IC Routing. PATMOS 2018: 155-162 - 28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018, Platja d'Aro, Spain, July 2-4, 2018. IEEE 2018, ISBN 978-1-5386-6365-3 [contents]
