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ORCIDHimadri Singh Raghav
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2020 – today
- 2022
[c7]Viveka Konandur Rajanna, Himadri Singh Raghav, Tianqi Wang
, Massimo Alioto:
Fully-Digital Broadband Calibration-Less Impedance Monitor for Probe Insertion Detection against Power Analysis Attacks. VLSI Technology and Circuits 2022: 144-145- 2020
- [j3]Himadri Singh Raghav, V. A. Bartlett:
Investigating the influence of adiabatic load on the 4-phase adiabatic system design. Integr. 75: 150-157 (2020)
2010 – 2019
- 2019
- [j2]Himadri Singh Raghav, Izzet Kale:
A balanced power analysis attack resilient adiabatic logic using single charge sharing transistor. Integr. 69: 147-160 (2019) - 2018
- [j1]Himadri Singh Raghav, Vivian A. Bartlett, Izzet Kale:
Investigating the effectiveness of Without Charge-Sharing Quasi-Adiabatic Logic for energy efficient and secure cryptographic implementations. Microelectron. J. 76: 8-21 (2018) - [c6]Himadri Singh Raghav, Vivian A. Bartlett, Izzet Kale:
Symmetric Power Analysis Attack Resilient Adiabatic Logic for Smartcard Applications. PATMOS 2018: 39-45 - 2017
- [c5]Himadri Singh Raghav, Vivian A. Bartlett, Izzet Kale:
A novel power analysis attack resilient adiabatic logic without charge sharing. ECCTD 2017: 1-4 - [c4]Himadri Singh Raghav, Vivian A. Bartlett, Izzet Kale:
Robustness of power analysis attack resilient adiabatic logic: WCS-QuAL under PVT variations. PATMOS 2017: 1-8 - 2016
- [c3]Himadri Singh Raghav, Vivian A. Bartlett, Izzet Kale:
Energy efficiency of 2-step charging power-clock for adiabatic logic. PATMOS 2016: 176-182 - 2013
- [c2]Himadri Singh Raghav, Sachin Maheshwari, B. Prasad Singh:
Performance Analysis of Subthreshold 32-Bit Kogge-Stone Adder for Worst-Case-Delay and Power in Sub-micron Technology. VDAT 2013: 100-107 - [c1]Sachin Maheshwari, Himadri Singh Raghav, Anu Gupta:
Characterization of Logical Effort for Improved Delay. VDAT 2013: 108-117
Coauthor Index
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