"A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS ..."

Zhongkai Wang et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830237

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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Zhongkai Wang, Minsoo Choi, Paul Kwon, Kyoungtae Lee, Bozhi Yin, Zhaokai Liu, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon:
A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology. VLSI Technology and Circuits 2022: 34-35

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