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ORCIDAlan N. Willson Jr.
Person information
- affiliation: University of California, Los Angeles, USA
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2010 – 2019
- 2019
[j36]Alireza Mehrnia, Alan N. Willson Jr.:
Optimally Factored IFIR Filters. Circuits Syst. Signal Process. 38(1): 259-286 (2019)- 2016
- [j35]Alireza Mehrnia, Ming Dai, Alan N. Willson Jr.:
Efficient Halfband FIR Filter Structures for RF and IF Data Converters. IEEE Trans. Circuits Syst. II Express Briefs 63-II(1): 64-68 (2016) - [j34]Alireza Mehrnia, Alan N. Willson Jr.:
FIR Filter Design via Extended Optimal Factoring. IEEE Trans. Signal Process. 64(4): 1061-1075 (2016) - 2015
- [j33]Alireza Mehrnia, Alan N. Willson Jr.:
Further Desensitized FIR Halfband Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1815-1824 (2015) - [j32]Alireza Mehrnia, Alan N. Willson Jr.:
Optimal Factoring of FIR Filters. IEEE Trans. Signal Process. 63(3): 647-661 (2015) - 2014
- [c65]Matt Bergeron, Alan N. Willson Jr.:
A 1-GHz direct digital frequency synthesizer in an FPGA. ISCAS 2014: 329-332 - 2013
- [j31]Chih-Wei Yao, Alan N. Willson Jr.:
A 2.8-3.2-GHz Fractional- N Digital PLL With ADC-Assisted TDC and Inductively Coupled Fine-Tuning DCO. IEEE J. Solid State Circuits 48(3): 698-710 (2013) - 2012
- [j30]Chia-Yu Yao, Alan N. Willson Jr.:
The Design of Hybrid Symmetric-FIR/Analog Pulse-Shaping Filters. IEEE Trans. Signal Process. 60(4): 2060-2065 (2012) - [c64]Shilpa Agarwal, Tzu-Chieh Kuo, Alan N. Willson Jr.:
A 275 MHz quadrature modulator in 0.18-µm CMOS. ISCAS 2012: 2949-2952 - 2011
- [c63]Alan N. Willson Jr., Mukund Ojha, Shilpa Agarwal, Thriven Lai, Tzu-Chieh Kuo:
A direct digital frequency synthesizer with minimized tuning latency of 12ns. ISSCC 2011: 138-140 - 2010
- [j29]Alan N. Willson Jr.:
Desensitized Half-Band Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 152-167 (2010) - [c62]Xiong Liu, Alan N. Willson Jr.:
A low-supply PLL with Enhanced Cascode Compensation and a low-supply-sensitivity CCO. CICC 2010: 1-4 - [c61]Xiong Liu, Alan N. Willson Jr.:
A 1.2 Gb/s recursive polyphase cascaded integrator-comb prefilter for high speed digital decimation filters in 0.18-μm CMOS. ISCAS 2010: 2115-2118 - [c60]Xiong Liu, Alan N. Willson Jr.:
A 70dB SNDR 10-MHz BW hybrid delta-sigma/pipeline ADC in 0.18-µm CMOS. SoCC 2010: 297-300
2000 – 2009
- 2009
- [j28]Jae Y. Kim, Chih-Wei Yao, Alan N. Willson Jr.:
A Programmable 25-MHz to 6-GHz Kvco Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 865-876 (2009) - [c59]Chih-Wei Yao, Alan N. Willson Jr.:
Frequency Synthesis with Arbitrary Input Clock Rate and Rational K/L Multiplier Ratio. ISCAS 2009: 1365-1368 - 2008
- [c58]Tzu-Chieh Kuo, Alan N. Willson Jr.:
A flexible decoder IC for WiMAX QC-LDPC codes. CICC 2008: 527-530 - [c57]Nicola Petra
, Alan N. Willson Jr.:
A high-speed and high-accuracy interpolator for digital modems. ICECS 2008: 1155-1158 - [c56]Tzu-Chieh Kuo, Alan N. Willson Jr.:
Enhanced delta-based layered decoding of WiMAX QC-LDPC codes. ISCAS 2008: 524-527 - [c55]Jae Y. Kim, Chih-Wei Yao, Alan N. Willson Jr.:
A programmable 25 MHz to 6 GHz rational-K/L frequency synthesizer with digital Kvco compensation. ISCAS 2008: 2629-2632 - [c54]Chia-Yu Yao, Alan N. Willson Jr.:
The design of asymmetrical square-root pulse-shaping filters with wide eye-openings. ISCAS 2008: 2665-2668 - 2007
- [c53]Tzu-Chieh Kuo, Alan N. Willson Jr.:
Low-latency Memory-efficient 150-Mbps Turbo FEC Encoder and Decoder. ISCAS 2007: 913-916 - [c52]Guichang Zhong, Alan N. Willson Jr.:
An Energy-efficient Reconfigurable Viterbi Decoder on a Programmable Multiprocessor. ISCAS 2007: 1565-1568 - [c51]Chia-Yu Yao, Alan N. Willson Jr.:
The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers. ISCAS 2007: 2056-2059 - 2006
- [j27]Guichang Zhong, Fan Xu, Alan N. Willson Jr.:
A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring. IEEE J. Solid State Circuits 41(2): 483-495 (2006) - [j26]Dengwei Fu, Alan N. Willson Jr.:
A two-stage angle-rotation architecture and its error analysis for efficient digital mixer implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(3): 604-614 (2006) - [c50]Chih-Wei Yao, Alan N. Willson Jr.:
Energy circulation quadrature LC-VCO. ISCAS 2006 - [c49]Chih-Wei Yao, Alan N. Willson Jr.:
A phase-noise reduction technique for quadrature LC-VCO with phase-to-amplitude noise conversion. ISSCC 2006: 701-710 - 2005
- [j25]Dengwei Fu, Alan N. Willson Jr.:
Trigonometric polynomial interpolation for timing recovery. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(2): 338-349 (2005) - [j24]Fan Xu, Guichang Zhong, Alan N. Willson Jr.:
Analysis and VLSI Realization of a Blind Beamforming Algorithm. J. VLSI Signal Process. 40(2): 159-174 (2005) - [c48]Kei-Yong Khoo, Alan N. Willson Jr.:
Efficient VLSI implementation of N/N integer division. ISCAS (1) 2005: 672-675 - 2004
- [j23]Fan Xu, Alan N. Willson Jr.:
Efficient hardware architectures for eigenvector and signal subspace estimation. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(3): 517-525 (2004) - [j22]Alan N. Willson Jr., Gabor C. Temes, Asad A. Abidi:
In Memoriam. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(12): 2341-2344 (2004) - [c47]Chih-Wei Yao, Hiep T. Pham, Alan N. Willson Jr.:
A 625 MHz to 10 GHz clock multiplier for re-transmitting 10 Gb/s serial data. CICC 2004: 155-158 - [c46]Guichang Zhong, Fan Xu, Alan N. Willson Jr.:
An energy-efficient reconfigurable FFT/IFFT processor based on a multi-processor ring. EUSIPCO 2004: 2023-2026 - [c45]Alireza Mehrnia, Alan N. Willson Jr.:
On optimal IFIR filter design. ISCAS (3) 2004: 133-136 - [c44]Xiong Liu, Alan N. Willson Jr.:
A new interpolated symbol timing recovery method. ISCAS (2) 2004: 569-572 - [c43]Guichang Zhong, Fan Xu, Dengwei Fu, Alan N. Willson Jr.:
An energy-efficient reconfigurable angle-rotator architecture. ISCAS (3) 2004: 661-664 - 2003
- [j21]Arthur Torosyan, Dengwei Fu, Alan N. Willson Jr.:
A 300-MHz quadrature direct digital synthesizer/mixer in 0.25-μm CMOS. IEEE J. Solid State Circuits 38(6): 875-887 (2003) - [j20]David D. Hwang, Dengwei Fu, Alan N. Willson Jr.:
A 400-MHz processor for the conversion of rectangular to polar coordinates in 0.25-μm CMOS. IEEE J. Solid State Circuits 38(10): 1771-1775 (2003) - [j19]Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.:
Optimal joint module-selection and retiming with carry-save representation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(7): 836-846 (2003) - [c42]Yanlin Wu, Dengwei Fu, Alan N. Willson Jr.:
A 415 MHz direct digital quadrature modulator in 0.25-μm CMOS. CICC 2003: 287-290 - 2002
- [c41]Zhan Yu, Meng-Lin Yu, Kamran Azadet, Alan N. Willson Jr.:
A low power adaptive filter using dynamic reduced 2's-complement representation. CICC 2002: 141-144 - [c40]Zhan Yu, Meng-Lin Yu, Kamran Azadet, Alan N. Willson Jr.:
The use of reduced two's-complement representation in low-power DSP design. ISCAS (1) 2002: 77-80 - [c39]Fan Xu, Guichang Zhong, D. D. Richard III, Alan N. Willson Jr.:
A ring-processor based blind beamformer design for use in wireless sensor networks. ISCAS (4) 2002: 205-208 - 2001
- [c38]Zhan Yu, Meng-Lin Yu, Alan N. Willson Jr.:
Signal Representation Guided Synthesis Using Carry-Save Adders For Synchronous Data-path Circuits. DAC 2001: 456-461 - [c37]Fan Xu, Alan N. Willson Jr.:
Local stability analysis and systolic implementation of a subspace tracking algorithm. ICASSP 2001: 3881-3884 - [c36]Fengqi Yu, Alan N. Willson Jr.:
Multirate digital squarer architectures. ICECS 2001: 177-180 - [c35]Fan Xu, Alan N. Willson Jr.:
Local stability analysis and hardware realization of an eigenvector tracking algorithm. ISCAS (2) 2001: 269-272 - [c34]Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.:
Design of optimal hybrid form FIR filter. ISCAS (2) 2001: 621-624 - 2000
- [j18]Michael C. Chen, Alan N. Willson Jr.:
Motion-vector optimization of control grid interpolation and overlapped block motion compensation using iterated dynamic programming. IEEE Trans. Image Process. 9(7): 1145-1157 (2000) - [j17]Pi Sheng Chang, Alan N. Willson Jr.:
Analysis of conjugate gradient algorithms for adaptive filtering. IEEE Trans. Signal Process. 48(2): 409-418 (2000) - [c33]Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.:
The use of carry-save representation in joint module selection and retiming. DAC 2000: 768-773 - [c32]Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.:
Efficient implementation of FIR filters using bit-level optimized carry-save additions. EUSIPCO 2000: 1-4 - [c31]Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.:
Joint module selection and retiming with carry-save representation. EUSIPCO 2000: 1-4 - [c30]Dengwei Fu, Alan N. Willson Jr.:
A fast synchronizer for burst modems with simultaneous symbol timing and carrier phase estimations. ISCAS 2000: 379-382
1990 – 1999
- 1999
- [j16]Avanindra Madisetti, Alan Y. Kwentus, Alan N. Willson Jr.:
A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range. IEEE J. Solid State Circuits 34(8): 1034-1043 (1999) - [c29]Larry A. Wasserman, Alan N. Willson Jr.:
A variable-rate filtering system for digital communications. ICASSP 1999: 1497-1500 - [c28]Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.:
Bit-level arithmetic optimization for carry-save additions. ICCAD 1999: 14-19 - [c27]Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.:
Improved-Booth encoding for low-power multipliers. ISCAS (1) 1999: 62-65 - [c26]Kei-Yong Khoo, Chao-Liang Chen, Alan N. Willson Jr.:
A CMOS pipelined carry-save array using true single-phase single-transistor-latch clocking. ISCAS (1) 1999: 298-301 - [c25]Fengqi Yu, Alan N. Willson Jr.:
Hardware efficient architectures for coupled-form IIR filters. ISCAS (3) 1999: 355-358 - [c24]Dengwei Fu, Alan N. Willson Jr.:
Design of an improved interpolation filter using a trigonometric polynomial. ISCAS (4) 1999: 363-366 - 1998
- [j15]Inyup Kang, Alan N. Willson Jr.:
Low-power Viterbi decoder for CDMA mobile terminals. IEEE J. Solid State Circuits 33(3): 473-482 (1998) - [j14]Michael C. Chen, Alan N. Willson Jr.:
Rate-distortion optimal motion estimation algorithms for motion-compensated transform video coding. IEEE Trans. Circuits Syst. Video Technol. 8(2): 147-158 (1998) - [j13]Parviz Saghizadeh, Alan N. Willson Jr.:
A new approach to the design of critically sampled M-channel uniform-band perfect-reconstruction linear-phase FIR filter banks. IEEE Trans. Signal Process. 46(6): 1544-1557 (1998) - [c23]Alan N. Willson Jr., Henry John Orchard:
A design method for half-band filters. EUSIPCO 1998: 1-4 - 1997
- [j12]Alan Y. Kwentus, Zhongnong Jiang, Alan N. Willson Jr.:
Application of filter sharpening to cascaded integrator-comb decimation filters. IEEE Trans. Signal Process. 45(2): 457-467 (1997) - [c22]Zhongnong Jiang, Alan N. Willson Jr.:
A pipelined/interleaved IIR digital filter architecture. ICASSP 1997: 2217-2220 - [c21]Pi Sheng Chang, Alan N. Willson Jr.:
Conjugate gradient method for adaptive direction-of-arrival estimation of coherent signals. ICASSP 1997: 2281-2284 - [c20]Fengqi Yu, Alan N. Willson Jr.:
A flexible hardware-oriented fast algorithm for motion estimation. ICASSP 1997: 2681-2683 - [c19]Michael C. Chen, Alan N. Willson Jr.:
A Spatial and Temporal Motion Vector Coding Algorithm for Low-Bit-Rate Video Coding. ICIP (2) 1997: 791-794 - 1996
- [j11]Kei-Yong Khoo, Alan Y. Kwentus, Alan N. Willson Jr.:
A programmable FIR digital filter using CSD coefficients. IEEE J. Solid State Circuits 31(6): 869-874 (1996) - [c18]Michael C. Chen, Alan N. Willson Jr.:
Motion vector optimization of control grid interpolation and overlapped block motion compensation using iterative dynamic programming. EUSIPCO 1996: 1-4 - [c17]Michael C. Chen, Alan N. Willson Jr.:
Rate-distortion optimal motion estimation algorithm for video coding. ICASSP 1996: 2096-2099 - [c16]Pi Sheng Chang, Alan N. Willson Jr.:
Adaptive spectral estimation using the conjugate gradient algorithm. ICASSP 1996: 2979-2982 - [c15]Kei-Yong Khoo, Alan N. Willson Jr.:
Cycle-Based Timing Simulations Using Event-Stream. ICCD 1996: 460-465 - [c14]Michael C. Chen, Alan N. Willson Jr.:
Design and optimization of a differentially coded variable block size motion compensation system. ICIP (3) 1996: 259-262 - 1995
- [j10]Michael M. Green, Alan N. Willson Jr.:
An algorithm for identifying unstable operating points using SPICE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(3): 360-370 (1995) - [j9]Avanindra Madisetti, Alan N. Willson Jr.:
A 100 MHz 2-D 8×8 DCT/IDCT processor for HDTV applications. IEEE Trans. Circuits Syst. Video Technol. 5(2): 158-165 (1995) - [j8]Zhongnong Jiang, Alan N. Willson Jr.:
Design and implementation of efficient pipelined IIR digital filters. IEEE Trans. Signal Process. 43(3): 579-590 (1995) - [c13]Kei-Yong Khoo, Alan N. Willson Jr.:
Single-transistor transparent-latch clocking. ARVLSI 1995: 331-341 - [c12]Parviz Saghizadeh, Alan N. Willson Jr.:
A generic approach to the design of M-channel uniform-band perfect-reconstruction linear-phase FIR filter banks. ICASSP 1995: 1300-1303 - [c11]Chao-Liang Chen, Kei-Yong Khoo, Alan N. Willson Jr.:
An Improved Polynomial-Time Algorithm for Designing Digital Filters with Power-of-Two Coefficients. ISCAS 1995: 223-226 - [c10]Michael C. Chen, Alan N. Willson Jr.:
A High Accuracy Predictive Logarithmic Motion Estimation Algorithm for Video Coding. ISCAS 1995: 617-620 - [c9]Michael J. Werter, Alan N. Willson Jr.:
Automated Programming of a Ring-Structured Multiprocessor Digital Filter IC. ISCAS 1995: 1372-1375 - [c8]Kei-Yong Khoo, Alan N. Willson Jr.:
Charge recovery on a databus. ISLPD 1995: 185-189 - 1994
- [j7]Alan Y. Kwentus, Hing-Tsun Hung, Alan N. Willson Jr.:
An architecture for high-performance/small-area multipliers for use in digital filtering applications. IEEE J. Solid State Circuits 29(2): 117-121 (1994) - [j6]Alan N. Willson Jr., Henry John Orchard:
An improvement to the Powell and Chau linear phase IIR filters. IEEE Trans. Signal Process. 42(10): 2842-2848 (1994) - [c7]Alan N. Willson Jr., Henry John Orchard:
An improvement to the Powell and Chau linear phase IIR filters. ICASSP (3) 1994: 573-576 - [c6]Parviz Saghizadeh, Alan N. Willson Jr.:
A New Approach to the Design of Three-Channel Perfect-Reconstruction Linear-Phase FIR Filter Banks. ISCAS 1994: 157-160 - [c5]Kei-Yong Khoo, Alan N. Willson Jr.:
Low Power CMOS Clock Buffer. ISCAS 1994: 355-358 - [c4]Zhongnong Jiang, Abeer A. Alwan, Alan N. Willson Jr.:
High-Performance IIR QMF Banks for Speech Subband Coding. ISCAS 1994: 493-496 - 1993
- [c3]Kei-Yong Khoo, Alan Y. Kwentus, Alan N. Willson Jr.:
An efficient 175 MHz programmable FIR digital filter. ISCAS 1993: 72-75 - [c2]Michael M. Green, Alan N. Willson Jr.:
On the relationship between negatve differential resistance and stability for nonlinear one-ports. ISCAS 1993: 2474-2477 - 1992
- [j5]Alan Y. Kwentus, Michael J. Werter, Alan N. Willson Jr.:
A programmable digital filter IC employing multiple processors on a single chip. IEEE Trans. Circuits Syst. Video Technol. 2(2): 231-244 (1992) - [j4]Bor-Rong Horng, Alan N. Willson Jr.:
Lagrange multiplier approaches to the design of two-channel perfect-reconstruction linear-phase FIR filter banks. IEEE Trans. Signal Process. 40(2): 364-374 (1992) - 1991
- [j3]Bor-Rong Horng, Henry Samueli, Alan N. Willson Jr.:
The design of low-complexity in linear-phase FIR filter banks using powers-of-two coefficients with an application to subband image coding. IEEE Trans. Circuits Syst. Video Technol. 1(4): 318-324 (1991) - [j2]R. H. Brackert, Henry John Orchard, Alan N. Willson Jr.:
A theorem providing bounds on digital filter scaling factors. IEEE Trans. Signal Process. 39(4): 956-958 (1991)
1980 – 1989
- 1989
- [c1]Ralph Hans Brackert Jr., Milos D. Ercegovac, Alan N. Willson Jr.:
Design of an on-line multiply-add module for recursive digital filters. IEEE Symposium on Computer Arithmetic 1989: 34-41
1970 – 1979
- 1970
- [j1]Alan N. Willson Jr.:
New theorems on the equations of nonlinear DC transistor networks. Bell Syst. Tech. J. 49(8): 1713-1738 (1970)
Coauthor Index
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