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2020 – today
- 2023
[j8]Tzu-Yi Yang
, Meng-Lin Yu, Ruey-Beei Wu:
Efficient Deployment of UWB Anchors for Wide-Area Positioning Coverage Using Bipartite Graph. IEEE Access 11: 19418-19427 (2023)
2010 – 2019
- 2012
- [c16]Yu-Jung Chen, Pai-Shun Ting, Meng-Lin Yu, Chia-Ming Chang, Shao-Yi Chien:
TCU: Thread compaction unit for GPGPU applications on mobile graphics hardware. MMSP 2012: 146-151
2000 – 2009
- 2002
- [j7]Kamran Azadet, Erich F. Haratsch, Helen Kim, Fadi Saibi, Jeffrey H. Saunders, Michael Shaffer, Leilei Song, Meng-Lin Yu:
Equalization and FEC techniques for optical transceivers. IEEE J. Solid State Circuits 37(3): 317-327 (2002) - [j6]Leilei Song, Meng-Lin Yu, Michael S. Shaffer:
10- and 40-Gb/s forward error correction devices for optical communications. IEEE J. Solid State Circuits 37(11): 1565-1573 (2002) - [c15]Zhan Yu, Meng-Lin Yu, Kamran Azadet, Alan N. Willson Jr.:
A low power adaptive filter using dynamic reduced 2's-complement representation. CICC 2002: 141-144 - [c14]Zhan Yu, Meng-Lin Yu, Kamran Azadet, Alan N. Willson Jr.:
The use of reduced two's-complement representation in low-power DSP design. ISCAS (1) 2002: 77-80 - 2001
- [c13]Kamran Azadet, Erich Haratsch, Helen Kim, Fadi Saibi, Jeffrey H. Saunders, Mike Shaffer, Leilei Song, Meng-Lin Yu:
DSP techniques for optical transceivers. CICC 2001: 281-288 - [c12]Zhan Yu, Meng-Lin Yu, Alan N. Willson Jr.:
Signal Representation Guided Synthesis Using Carry-Save Adders For Synchronous Data-path Circuits. DAC 2001: 456-461 - 2000
- [c11]Hanho Lee, Meng-Lin Yu, Leilei Song:
VLSI design of Reed-Solomon decoder architectures. ISCAS 2000: 705-708
1990 – 1999
- 1995
- [j5]Sumit Ghosh, Erik DeBenedictis, Meng-Lin Yu:
YADDES: a novel algorithm for deadlock-free distributed discrete-event simulation. Int. J. Comput. Simul. 5(1): 43-83 (1995) - [j4]Sumit Ghosh, Meng-Lin Yu:
An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors. IEEE Trans. Parallel Distributed Syst. 6(6): 639-652 (1995) - 1994
- [c10]Meng-Lin Yu, Bryan D. Ackland:
VLSI timing simulation with selective dynamic regionization. Annual Simulation Symposium 1994: 208-216 - [c9]Meng-Lin Yu, Bryan D. Ackland:
VLSI timing simulation with selective dynamic regionization. ICCAD 1994: 195-199 - 1993
- [c8]P. A. Subrahmanyam, Josep M. Espinalt, Meng-Lin Yu:
Specification and Synthesis of Mixed-Mode Systems: Experiments in a VHDL Environment. ICCD 1993: 235-241 - [c7]Meng-Lin Yu, P. A. Subrahmanyam:
Hazard-Free Asynchronous Circuit Synthesis. Asynchronous Design Methodologies 1993: 87-105 - 1992
- [c6]Meng-Lin Yu:
En route to more efficient conservative parallel event simulation. Annual Simulation Symposium 1992: 54-60 - [c5]Meng-Lin Yu, P. A. Subrahmanyam:
A Path-Oriented Approach for Reducing Hazards in Asynchronous Designs. DAC 1992: 239-244 - 1991
- [j3]Erik DeBenedictis, Sumit Ghosh, Meng-Lin Yu:
A Novel Algorithm for Discrete-Event Simulation: Asynchronous Distributed Discrete-Event Simulation Algorithm for Cyclic Circuits Using A Dataflow Network. Computer 24(6): 21-33 (1991) - [c4]Meng-Lin Yu, Sumit Ghosh, Erik DeBenedictis:
A provably correct, non-deadlocking parallel event simulation algorithm. Annual Simulation Symposium 1991: 100-111 - 1990
- [j2]Wu-Tung Cheng, Meng-Lin Yu:
Differential fault simulation for sequential circuits. J. Electron. Test. 1(1): 7-13 (1990)
1980 – 1989
- 1989
- [j1]Sumit Ghosh, Meng-Lin Yu:
A Preemtive Scheduling Mechanism for Accurate Behavioral Simulation of Digital Designs. IEEE Trans. Computers 38(11): 1595-1600 (1989) - [c3]Meng-Lin Yu:
A Study of the Applicability of Hopfield Decision Neural Nets to VLSI CAD. DAC 1989: 412-417 - [c2]Wu-Tung Cheng, Meng-Lin Yu:
Differential Fault Simulation - a Fast Method Using Minimal Memory. DAC 1989: 424-428 - 1988
- [c1]Sumit Ghosh, Meng-Lin Yu:
An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors. ICPP (1) 1988: 74-77 - 1986
- [b1]Meng-Lin Yu:
Automatic Random Logic Layout Synthesis - a Module Generator Approach (VlSI, Silicon Compilation, Design Automation, Cell Synthesis, Grid). University of Illinois Urbana-Champaign, USA, 1986
Coauthor Index
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