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ORCIDXiaoming Liu 0008
Person information
- affiliation: Shanghai Jiao Tong University, China
Other persons with the same name
- Xiaoming Liu (aka: Xiao-Ming Liu) — disambiguation page
- Xiaoming Liu 0001 — National Computer Network Emergency Response Technical Team/Coordination Center of China, Beijing, China
- Xiaoming Liu 0002
![[0000-0003-3215-8753]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-3215-8753")
— Michigan State University, MI, USA (and 1 more) - Xiaoming Liu 0003 — Cornell University
- Xiaoming Liu 0004 — Wuhan University of Science and Technology, College of Computer Science and Technology, China (and 2 more)
- Xiaoming Liu 0005 — OCLC (and 2 more)
- Xiaoming Liu 0006 — Univ. of Texas Health Science Center, Houston
- Xiaoming Liu 0007 — Beijing Institute of Technology, Intelligent Robotics Institute, School of Mechatronical Engineering, China
- Xiaoming Liu 0009 — University of Macao, China
- Xiaoming Liu 0010 — University of Macau, Taipa, Macau (and 2 more)
- Xiaoming Liu 0011 — Xi'an Jiaotong University, MOE Key Lab for Intelligent Networks and Network Security, China
- Xiaoming Liu 0012 — NOAA/NESDIS Center for Satellite Applications and Research (STAR), College Park, MD, USA
- Xiaoming Liu 0013 — Northeast Pet. Univ., Daqing, China
- Xiaoming Liu 0014 — University of Western Ontario, London, ON, Canada
- Xiaoming Liu 0015 — PLA University of Science & Technology, Nanjing, China
- Xiaoming Liu 0016 — Beihang University, School of Astronautics, Beijing, China
- Xiaoming Liu 0017 — Beijing University of Posts and Telecommunications, School of Information and Communication Engineering, Beijing, China
- Xiaoming Liu 0018 — Nanjing Forestry University, College of Information Science and Technology, Nanjing, China (and 1 more)
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2020 – today
- 2024
[j17]Xiaofei Wang, Jing Jin, Xiaoming Liu, Hui Wang, Huzhi Tang, Chao Yang, Yuekang Guo, Tingting Mo, Jianjun Zhou:
A 0.83-pJ/b 20-Gb/s/Pin Single-Ended Transceiver With AC/DC-Coupled Pre-Emphasis FFE and Edge-Dependent Phase-Modulation DFE for Low-Power Memory Controllers. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 560-572 (2024)- [c22]Jing Jin, Yuekang Guo, Meng Xu, Xiaoming Liu, Nan Sun, Jianjun Zhou:
A 470μW 20kHz-BW 107.3dB-SNDR Nested CT DSM Employing Negative-R-Based Cross-RC Filter and Weighted Multi-Threshold MSB-Pass Quantizer. CICC 2024: 1-2 - 2023
- [j16]Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A 60-MS/s 5-MHz BW Noise-Shaping SAR ADC With Integrated Input Buffer Achieving 84.2-dB SNDR and 97.3-dB SFDR Using Dynamic Level-Shifting and ISI-Error Correction. IEEE J. Solid State Circuits 58(2): 474-485 (2023) - [j15]Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A 372 μW 10 kHz-BW 109.2 dB-SNDR Nested Delta-Sigma Modulator Using Hysteresis-Comparison MSB-Pass Quantization. IEEE J. Solid State Circuits 58(9): 2554-2563 (2023) - [j14]Chao Yang, Sheng Wang, Xiaoming Liu, Jing Jin, Jianjun Zhou:
A 4 GHz FLL-less fast-locking sampling PLL with gain-boosted sampling phase-frequency detector in 28 nm CMOS. Microelectron. J. 139: 105890 (2023) - [j13]Minjing Lee, Xiaoming Liu, Zhaolin Yang, Jing Jin, Lin-Sheng Wu:
A Compact 0.2-1.6 GHz 20 MHz-Bandwidth Passive-LNA Exploiting an N-Path 1:3 Transformer. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1699-1703 (2023) - [c21]Weizhen Cai, Jianjun Zhou, Xiaobo Chen, Xiaoming Liu:
A High Precision CMOS Temperature Detector with Curvature Calibration Technique. ASICON 2023: 1-4 - [c20]Hanqi Gao, Jing Jin, Zhaolin Yang, Jianjun Zhou, Xiaoming Liu:
A 30GHz Bidirectional PA/LNA with Transformer-Based Switchable RC Matching Network. ASICON 2023: 1-4 - [c19]Zhaolin Yang, Jing Jin, Yuyang Chen, Jianjun Zhou, Xiaoming Liu:
A Wideband Inductorless LNA Employing Dual-Loop Feedback for Low-Power Applications. ASICON 2023: 1-4 - [c18]Shengyuan Zhou, Ziyao Xia, Chao Yang, Xiaoming Liu, Sheng Wang, Jing Jin:
Fast locking Sampling PLL Using Phase Error Eliminator. ASICON 2023: 1-4 - [c17]Yuekang Guo, Jing Jin, Xiaoming Liu, Zhaolin Yang, Jianjun Zhou:
A LUT-based Background Linearization Technique for VCO-based ADC Employing $K_{\text{VCO}}-\text{Locked}-\text{Loop}$. ISCAS 2023: 1-4 - [c16]Huzhi Tang, Xiaoming Liu, Chao Yang, Jing Jin:
An ADPLL with Two-Point Modulation Gain Calibration for 2.4GHz ISM-Band in 40nm CMOS. ISCAS 2023: 1-4 - [c15]Xiaofei Wang, Jing Jin, Xiaoming Liu, Zhaolin Yang, Shan Wang, Jianjun Zhou:
A 16/32-Gb/s/pin Dual-Mode Single-Ended Transmitter with Pre-Emphasis FFE and RLM-Enhanced ZQ Calibration for Memory Interfaces. ISCAS 2023: 1-4 - [c14]Jiayi Chen, Xiaoming Liu, Chao Yang, Jing Jin, Zhongyuan Chang, Jianjun Zhou:
Predictive LSB-First Successive Approximation for SAR Analog-to-Digital Converters. MWSCAS 2023: 118-122 - [c13]Shunyan Wang, Yuekang Guo, Qiang Pan, Xiaoming Liu, Shan Wang, Jing Jin:
A Fully Synthesizable Dynamic Voltage Comparator with Time-Domain Offset Calibration. MWSCAS 2023: 482-485 - [c12]Ke Wu, Yuekang Guo, Xiaoming Liu, Jing Jin, Howard C. Yang, Jianjun Zhou:
A Non-Linearity Digital Background Calibration Algorithm with Piece-Wise Linear Functions. MWSCAS 2023: 609-613 - 2022
- [j12]Chao Yang, Xiaoming Liu, Jing Jin, Jianjun Zhou:
A 0.023-12 GHz ultra-wideband frequency synthesizer with FOMT of -251.8 dB. Microelectron. J. 120: 105357 (2022) - [j11]Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
An 18.1 mW 50 MHz-BW 76.4 dB-SNDR CTSDM With PVT-Robust VCO Quantizer and Latency-Free Background-Calibrated DAC. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4787-4798 (2022) - [j10]Chao Yang, Xiaoming Liu, Jing Jin, Yuekang Guo, Jianjun Zhou:
A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination PFDCP. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 3998-4002 (2022) - [c11]Yuekang Guo, Xiaoming Liu, Jing Jin, Jianjun Zhou:
A 3bit/cycle 1GS/s 8-bit SAR ADC Employing Asynchronous Ping-Pong Quantization Scheme. ISCAS 2022: 2650-2654 - [c10]Ke Wu, Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A Power-Efficient CMOS Image Sensor with In-Sensor Processing and In-Pixel Gain Calibration. MWSCAS 2022: 1-4 - 2021
- [j9]Mengying Hu, Jing Jin, Yuekang Guo, Xiaoming Liu, Jianjun Zhou:
A Power-Efficient SAR ADC with Optimized Timing-Redistribution Asynchronous SAR Logic in 40-nm CMOS. Circuits Syst. Signal Process. 40(7): 3125-3142 (2021) - [j8]Haopeng Kang, Jing Jin, Xiaoming Liu, Xiaofei Wang, Pengli Hong, Jianjun Zhou:
A fully integrated multiphase switched-capacitor DC-DC converter with PFM control and charge sharing loss reduction. Microelectron. J. 108: 104991 (2021) - [j7]Xiaoming Liu, Jing Jin, Xiaofei Wang, Jianjun Zhou:
A 2.4 GHz receiver with a current-reused inductor-less noise-canceling balun LNA in 40 nm CMOS. Microelectron. J. 113: 105065 (2021) - [c9]Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A Phase Domain Excess Loop Delay Compensation Technique with Latency Optimized Phase Selector for VCO-Based Continuous-Time ΔΣ ADC. ISCAS 2021: 1-4 - [c8]Zhengqi Xu, Ke Wu, Xiaoming Liu, Chengyuan Liu, Jing Jin, Jianjun Zhou:
A Ka-Band Quadrature-Hybrid LNA-PS with Gm- Boosting Technique in 40-nm CMOS. ISCAS 2021: 1-5 - [c7]Yuekang Guo, Qiang Pan, Xiaoming Liu, Jing Jin:
A Center Frequency Calibration Technique for Ring VCO Exploiting Delay-1 Detection. MWSCAS 2021: 708-711 - 2020
- [j6]Yuekang Guo, Jing Jin, Xiaoming Liu, Jianjun Zhou:
An Inverter-Based Continuous Time Sigma Delta ADC With Latency-Free DAC Calibration. IEEE Trans. Circuits Syst. 67-I(11): 3630-3642 (2020) - [j5]Litong Liu, Jing Jin, Xiaoming Liu, Jianjun Zhou:
A Multi-Modulus Fractional Divider With TDC Free Calibration Scheme for Mitigation of TX-VCO Pulling. IEEE Trans. Circuits Syst. 67-II(12): 2848-2852 (2020) - [j4]Xiaofei Wang, Jing Jin, Xiaoming Liu, Jianjun Zhou:
An ISM Band High-Linear Current-Reuse Up-Conversion Mixer With Built-in-Self-Calibration for LOFT and I/Q Imbalance. IEEE Trans. Circuits Syst. 67-II(12): 2898-2902 (2020) - [c6]Ran Wang, Yuekang Guo, Jing Jin, Xiaoming Liu, Naifeng Jing, Jianjun Zhou:
A Low Power Temperature-Compensated Common-Mode Voltage Detector for Dynamic Amplifiers. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [j3]Jing Jin, Xiaoming Liu, Jianjun Zhou:
A 0.25-dB-Step, 68-dB-Dynamic Range Analog Baseband With Digitally Assisted DCOC and AGC for Multi-Standard TV Applications. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1623-1627 (2019) - [j2]Jing Jin, Xiaoming Liu, Taotao Yan, Jianjun Zhou:
Fully Configurable Capacitor-Less Oversampling DC Offset Cancellation for Direct Conversion Receivers. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1683-1687 (2019) - [c5]Yingying Liang, Xiaoming Liu, Jing Jin:
An Optimized Modeling Method for Transformer Design. ASICON 2019: 1-4 - 2014
- [c4]Jing Jin, Bukun Pan, Xiaoming Liu, Jianjun Zhou:
Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking range. ISCAS 2014: 502-505 - [c3]Jing Jin, Bukun Pan, Xiaoming Liu, Jianjun Zhou:
Digital spur calibration of multi-modulus fractional frequency LO divider utilizing most correlated comparison algorithm. ISCAS 2014: 742-745 - 2012
- [j1]Jing Jin, Xiaoming Liu, Tingting Mo, Jianjun Zhou:
Quantization Noise Suppression in Fractional-N PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(5): 926-937 (2012) - 2011
- [c2]Xiaoming Liu, Jing Jin, Xi Li, Jianjun Zhou:
Glitch-Free Multi-Modulus Frequency Divider for Quantization Noise suppression in fractional-N PLLs. ISCAS 2011: 478-481 - [c1]Xiaoming Liu, Jing Jin, Cui Mao, Jianjun Zhou:
Linear range extensible Phase Frequency Detector and Charge Pump for fast frequency acquisition. ISCAS 2011: 985-988
Coauthor Index
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