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Xin Cheng 0001
Person information
- affiliation: Hefei University of Technology, School of Electronic Science and Applied Physics, China
- affiliation (PhD 2012): Chinese Academy of Sciences, Institute of Electronics, Beijing, China
Other persons with the same name
- Xin Cheng — disambiguation page
- Xin Cheng 0002 — Peking University, Institute of Computer Technology, Center for Data Science, Beijing, China
- Xin Cheng 0003 — Chang'an University, School of Information Engineering, Xi'an, China
- Xin Cheng 0004 — Hosei University, Tokyo, Japan (and 1 more)
- Xin Cheng 0005 — University of Science and Technology Beijing, School of Computer and Communication Engineering, China
- Xin Cheng 0006 — Nanjing University of Science and Technology, School of Electronic and Optical Engineering, China
- Xin Cheng 0007 — Chongqing University, China
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2020 – today
- 2024
- [j33]Zhang Zhang, Annan Wang, Hongtao Ren, Guangjun Xie, Xin Cheng:
Voltage-Resistance-Adaptive MPPT Circuit for Energy Harvesting. IEEE Des. Test 41(3): 54-62 (2024) - [j32]Juntao Han, Xin Cheng, Guangjun Xie, Junwei Sun, Gang Liu, Zhang Zhang:
Memristor-Based Neural Network Circuit of Associative Memory With Occasion Setting. IEEE Trans. Cogn. Dev. Syst. 16(3): 1016-1026 (2024) - 2023
- [j31]Xin Cheng, Yunfeng Zhang, Haowen Zhu, Yang Zhou:
A true random number generator with high bit rate and low energy efficiency. Int. J. Circuit Theory Appl. 51(7): 3415-3431 (2023) - [j30]Xin Cheng, Yixuan Xu, Kefan Wang, Yongqiang Zhang, Bin Li, Zhang Zhang:
Lightweight and flexible hardware implementation of authenticated encryption algorithm SIMON-Galois/Counter Mode. Int. J. Circuit Theory Appl. 51(12): 5951-5961 (2023) - [j29]Yongqiang Zhang, Lingyun Xie, Jie Han, Xin Cheng, Guangjun Xie:
Highly Accurate and Energy Efficient Binary-Stochastic Multipliers for Fault-Tolerant Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 771-775 (2023) - [j28]Yongqiang Zhang, Siting Liu, Jie Han, Zhendong Lin, Shaowei Wang, Xin Cheng, Guangjun Xie:
An Energy-Efficient Binary-Interfaced Stochastic Multiplier Using Parallel Datapaths. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1439-1443 (2023) - 2022
- [j27]Shaowei Wang, Guangjun Xie, Wenbing Xu, Xin Cheng, Yongqiang Zhang:
High-accuracy mean circuits design by manipulating correlation for stochastic computing. Int. J. Circuit Theory Appl. 50(10): 3692-3703 (2022) - [j26]Zhang Zhang, Ao Xu, Hongtao Ren, Gang Liu, Xin Cheng:
Reconfigurable multivalued memristor FPGA model for digital recognition. Int. J. Circuit Theory Appl. 50(11): 3846-3860 (2022) - [j25]Zhang Zhang, Ao Xu, Chao Li, Gang Liu, Xin Cheng:
Mathematical analysis and circuit emulator design of the three-valued memristor. Integr. 86: 74-83 (2022) - [j24]Feifei Deng, Guangjun Xie, Xin Cheng, Yongqiang Zhang:
A general and efficient clocking scheme for majority logic in quantum-dot cellular automata. Microelectron. J. 128: 105544 (2022) - [j23]Yongqiang Zhang, Chunsong Zhu, Xin Cheng, Guangjun Xie:
Design and Implementation of SRAM for LUT and CLB Using Clocking Mechanism in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3909-3913 (2022) - [j22]Shaowei Wang, Guangjun Xie, Xin Cheng, Yongqiang Zhang:
Weighted-Adder-Based Polynomial Computation Using Correlated Unipolar Stochastic Bitstreams. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4528-4532 (2022) - [j21]Zhang Zhang, Ao Xu, Chao Li, Yadong Wei, Zhiheng Ge, Xin Cheng, Gang Liu:
Gate-Controlled Memristor FPGA Model for Quantified Neural Network. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4583-4587 (2022) - [j20]Yizhong Yang, Jiahao Ruan, Yongqiang Zhang, Xin Cheng, Zhang Zhang, Guangjun Xie:
STPNet: A Spatial-Temporal Propagation Network for Background Subtraction. IEEE Trans. Circuits Syst. Video Technol. 32(4): 2145-2157 (2022) - [j19]Yizhong Yang, Zhihang Cheng, Haotian Yu, Yongqiang Zhang, Xin Cheng, Zhang Zhang, Guangjun Xie:
MSE-Net: generative image inpainting with multi-scale encoder. Vis. Comput. 38(8): 2647-2659 (2022) - 2021
- [j18]Xin Cheng, Bin Li, Haowen Zhu, Yongqiang Zhang, Zhang Zhang:
A high-resolution hybrid digital pulse width modulator with dual-edge-triggered flip-flops and hardware compensation. Int. J. Circuit Theory Appl. 49(1): 159-168 (2021) - [j17]Zhang Zhang, Shu Xu, Hongyuan Wu, Guangjun Xie, Xin Cheng:
An output capacitor-less low-dropout regulator with wide load capacitance and current ranges. Int. J. Circuit Theory Appl. 49(3): 853-863 (2021) - [j16]Zhang Zhang, Zechen Tang, Zhang Yunfeng, Xin Cheng, Guangjun Xie:
A novel control circuit for piezoelectric energy harvesting. Microelectron. J. 113: 105068 (2021) - [j15]Xin Cheng, Haowen Zhu, Yixuan Xu, Yongqiang Zhang, Hao Xiao, Zhang Zhang:
A reconfigurable and compact hardware architecture of CLEFIA block cipher with multi-configuration. Microelectron. J. 114: 105144 (2021) - [j14]Haowei Guan, Zhang Zhang, Xin Cheng, Yizhong Yang, Guangjun Xie:
Using correction parameters to improve real-time video interpolation in low-cost VLSI implementation. Microelectron. J. 117: 105254 (2021) - [c5]Xin Cheng, Haowen Zhu, Xinyi Xing, Yunfeng Zhang, Yongqiang Zhang, Guangjun Xie, Zhang Zhang:
A Feedback Architecture of High Speed True Random Number Generator based on Ring Oscillator. A-SSCC 2021: 1-3 - 2020
- [j13]Xin Cheng, Wanjing Shao, Yongqiang Zhang, Jianmin Zeng, Zhang Zhang:
High frequency and high efficiency DC-DC converter with sensorless adaptive-sizing technique. IEICE Electron. Express 17(3): 20190719 (2020) - [j12]Jianmin Zeng, Zhang Zhang, Runhao Chen, Shiyue Liang, Tianlin Cao, Zhiyi Yu, Xin Cheng, Guangjun Xie:
DM-IMCA: A dual-mode in-memory computing architecture for general purpose processing. IEICE Electron. Express 17(4): 20200005 (2020) - [j11]Hao Xiao, Yanming Fan, Fen Ge, Zhang Zhang, Xin Cheng:
Algorithm-Hardware Co-Design of Real-Time Edge Detection for Deep-Space Autonomous Optical Navigation. IEICE Trans. Inf. Syst. 103-D(10): 2047-2058 (2020) - [j10]Feifei Deng, Guangjun Xie, Xin Cheng, Zhang Zhang, Yongqiang Zhang:
CFE: a convenient, flexible, and efficient clocking scheme for quantum-dot cellular automata. IET Circuits Devices Syst. 14(1): 88-92 (2020) - [j9]Feifei Deng, Guangjun Xie, Shaowei Wang, Xin Cheng, Yongqiang Zhang:
An Ultra-Low-Power Five-Input Majority Gate in Quantum-Dot Cellular Automata. J. Circuits Syst. Comput. 29(11): 2050176:1-2050176:19 (2020) - [j8]Xin Cheng, Wanjing Shao, Lixin Xu, Yongqiang Zhang, Guangjun Xie, Zhang Zhang:
A High Resolution DPWM Based on Synchronous Phase-Shifted Circuit and Delay Line. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(8): 2685-2692 (2020) - [j7]Zhixin Song, Guangjun Xie, Xin Cheng, Lei Wang, Yongqiang Zhang:
An Ultra-Low Cost Multilayer RAM in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. 67-II(12): 3397-3401 (2020)
2010 – 2019
- 2019
- [j6]Haotian Chen, Hongjun Lv, Zhang Zhang, Xin Cheng, Guangjun Xie:
Design and Analysis of a Novel Low-Power Exclusive-OR Gate Based on Quantum-Dot Cellular Automata. J. Circuits Syst. Comput. 28(8): 1950141:1-1950141:17 (2019) - [c4]Zhang Zhang, Shu Xu, Fangzhou Yao, Guangjun Xie, Xin Cheng:
A 30MHz Delay-Line-Based Buck Converter with 5.7%-94.8% Switching Duty Cycle. APCCAS 2019: 53-56 - [c3]Xin Cheng, Bo Cheng, Zechen Tang, Yongqiang Zhang, Zhang Zhang:
A Single-Input Multi-Output Piezoelectric Energy Harvesting System Combining with P-SSHI and Cold Startup Circuit. APCCAS 2019: 65-68 - [c2]Hao Xiao, Yanming Fan, Zhang Zhang, Xin Cheng:
A Fast and Accurate Edge Detection Algorithm for Real-Time Deep-Space Autonomous Optical Navigation. IDAACS 2019: 601-604 - 2018
- [j5]Chubin Wu, Zhang Zhang, Jianmin Zeng, Xin Cheng, Guangjun Xie:
A Qi compatible wireless power receiver with integrated full-wave synchronous rectifier. Sci. China Inf. Sci. 61(12): 129402:1-129402:3 (2018) - [j4]Chubin Wu, Guangjun Xie, Zhang Zhang, Xin Cheng, Tairan Fei, Jianmin Zeng, Xiaoyang Zeng:
A 15 W wireless power receiver with an improved full-wave synchronous rectifier. IEICE Electron. Express 15(20): 20180732 (2018) - [c1]Zhang Zhang, Lingling Wei, Xiaojuan Zhou, Taolue Zhu, Guangjun Xie, Xin Cheng:
Study of High Voltage Deep Brain Stimulation. APCCAS 2018: 119-122 - 2017
- [j3]Jianmin Zeng, Chubin Wu, Zhang Zhang, Xin Cheng, Guangjun Xie, Jun Han, Xiaoyang Zeng, Zhiyi Yu:
A multi-core-based heterogeneous parallel turbo decoder. IEICE Electron. Express 14(18): 20170768 (2017) - [j2]Xin Cheng, Hongyu Liang, Longjie Du, Zhang Zhang, Maoxiang Yi, Guangjun Xie:
An Output-Capacitorless Ultra-Low Power Low-Dropout Regulator. J. Circuits Syst. Comput. 26(12): 1750193:1-1750193:11 (2017) - 2014
- [j1]Xin Cheng, Guangjun Xie, Zhang Zhang, Yizhong Yang:
Fast-Settling Feedforward Automatic Gain Control Based on a New Gain Control Approach. IEEE Trans. Circuits Syst. II Express Briefs 61-II(9): 651-655 (2014)
Coauthor Index
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