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Journal Articles
- 2021
[j9]Dongxing Li, Zuying Luo:
Regression Loss in Transformer-based Supervised Neural Machine Translation. Int. J. Comput. Commun. Control 16(4) (2021)- 2012
- [j8]Zuying Luo, Guoxing Zhao, Joseph A. Gordon, Sheldon X.-D. Tan:
Localized relaxation theory of circuits and its applications in electro-thermal analyses. Sci. China Inf. Sci. 55(4): 938-950 (2012) - [j7]Wenjian Yu, Qingqing Zhang, Zuochang Ye, Zuying Luo:
Efficient statistical capacitance extraction of nanometer interconnects considering the on-chip line edge roughness. Microelectron. Reliab. 52(4): 704-710 (2012) - 2006
- [j6]Zuying Luo, Yici Cai, Sheldon X.-D. Tan, Xianlong Hong, Xiaoyi Wang, Zhu Pan, Jingjing Fu:
Time-domain analysis methodology for large-scale RLC circuits and its applications. Sci. China Ser. F Inf. Sci. 49(5): 665-680 (2006) - [j5]Yici Cai, Jingjing Fu, Xianlong Hong, Sheldon X.-D. Tan, Zuying Luo:
Power/Ground Network Optimization Considering Decap Leakage Currents. IEEE Trans. Circuits Syst. II Express Briefs 53-II(10): 1012-1016 (2006) - 2005
- [j4]Yici Cai, Jin Shi, Zuying Luo, Xianlong Hong:
Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain. J. Comput. Sci. Technol. 20(2): 224-230 (2005) - 2004
- [j3]Yongjun Xu, Zuying Luo, Xiaowei Li, Li-Jian Li, Xianlong Hong:
Leakage Current Estimation of CMOS Circuit with Stack Effect. J. Comput. Sci. Technol. 19(5): 708-717 (2004) - [j2]Xiaohai Wu, Xianlong Hong, Yici Cai, Zuying Luo, Chung-Kuan Cheng, Jun Gu, Wayne Wei-Ming Dai:
Area minimization of power distribution network using efficient nonlinear programming techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(7): 1086-1094 (2004) - 2002
- [j1]Zuying Luo, Yinghua Min, Shiyuan Yang, Xiaowei Li:
The monotonic increasing relationship between average powers of CMOS VLSI circuits with and without delay and its applications. Sci. China Ser. F Inf. Sci. 45(6): 401-415 (2002)
Conference and Workshop Papers
- 2015
- [c22]Tian Zou, Zuying Luo:
PS-BloTAM: Pre-sampling based architecture-level temperature analysis methodology. ASICON 2015: 1-4 - [c21]Chuangao Tang, Pengfei Xu, Zuying Luo, Guoxing Zhao, Tian Zou:
Automatic Facial Expression Analysis of Students in Teaching Environments. CCBR 2015: 439-447 - 2013
- [c20]Jiaqi Wang, Yuedou Pan, Liang Tang, Zuying Luo:
Thermal Analysis with Considering Interactions among Temperature/Power/Heat Conductance and Its Fast Precondition-Solving Algorithm FPSCG. CAD/Graphics 2013: 81-86 - [c19]Jiaqi Yan, Zuying Luo, Liang Tang:
Accurate architecture-level thermal analysis methods for MPSoC with consideration for leakage power dependence on temperature. ISQED 2013: 178-183 - 2012
- [c18]Huang Kun, Yang Xu, Guoxing Zhao, Zuying Luo:
Efficient electro-thermal co-analysis on CPU+GPU heterogeneous architecture. ISQED 2012: 364-369 - 2011
- [c17]Huang Kun, Guoxing Zhao, Yang Xu, Zuying Luo:
Comprehensive electro-thermal(ET) analysis with considering ET coupling. ASICON 2011: 409-412 - [c16]Xu Yang, Liang Tang, Kun Huang, Guoxing Zhao, Xingxing Xing, Zuying Luo:
Row-Based Analysis of Structure Power/Ground Grids with General Purpose GPU. CAD/Graphics 2011: 478-485 - 2009
- [c15]Zuying Luo, Lin Dingyi, Li Xingde:
FODA: Fast open-defect analysis method for power/ground networks. CAD/Graphics 2009: 429-434 - [c14]Fu Zhaoguo, Sun Chaoshan, Zuying Luo:
An task scheduling algorithm of real-time leakage power and temperature optimization for MPSoC. CAD/Graphics 2009: 478-483 - [c13]Zuying Luo, Jeffrey Fan, Sheldon X.-D. Tan:
Localized Statistical 3D Thermal Analysis Considering Electro-Thermal Coupling. ISCAS 2009: 1289-1292 - 2008
- [c12]Zuying Luo, Sheldon X.-D. Tan:
Statistic Analysis of Power/Ground Networks Using Single-Node SOR Method. ISQED 2008: 867-872 - 2007
- [c11]Zuying Luo, Pengliang Ao:
SN-SOR: Single-Node SOR Method for Statistic Analysis of Power/Ground Networks. CAD/Graphics 2007: 309-314 - 2006
- [c10]Zuying Luo:
General transistor-level methodology on VLSI low-power design. ACM Great Lakes Symposium on VLSI 2006: 115-118 - 2005
- [c9]Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan:
VLSI on-chip power/ground network optimization considering decap leakage currents. ASP-DAC 2005: 735-738 - [c8]Yongjun Xu, Jinghua Chen, Zuying Luo, Xiaowei Li:
Vector extraction for average total power estimation. ASP-DAC 2005: 1086-1089 - 2004
- [c7]Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan:
A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery. ASP-DAC 2004: 505-510 - [c6]Weikun Guo, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong:
Partial random walk for large linear network analysis. ISCAS (5) 2004: 173-177 - [c5]Yongjun Xu, Zuying Luo, Xiaowei Li:
A maximum total leakage current estimation method. ISCAS (2) 2004: 757-760 - [c4]Zhu Pan, Yici Cai, Sheldon X.-D. Tan, Zuying Luo, Xianlong Hong:
Transient Analysis of On-Chip Power Distribution Networks Using Equivalent Circuit Modeling. ISQED 2004: 63-68 - [c3]Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, Sheldon X.-D. Tan, Zhu Pan:
Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery. PATMOS 2004: 433-441 - 2003
- [c2]Yongjun Xu, Zuying Luo, Zhiguo Chen, Xiaowei Li:
Average Leakage Current Macromodeling for Dual-Threshold Voltage Circuits. Asian Test Symposium 2003: 196-201 - 2002
- [c1]Zuying Luo, Xiaowei Li, Huawei Li, Shiyuan Yang, Yinghua Min:
Test Power Optimization Techniques for CMOS Circuits. Asian Test Symposium 2002: 332-337
Coauthor Index
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