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Yasutaka Horiba
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2000 – 2009
- 2006
- [j7]Takayuki Gyohten, Fukashi Morishita
, Isamu Hayashi, Mako Okamoto, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Yasutaka Horiba:
An On-Chip Supply-Voltage Control System Considering PVT Variations for Worst-Caseless Lower Voltage SoC Design. IEICE Trans. Electron. 89-C(11): 1519-1525 (2006) - 2005
- [j6]Toshiki Kanamoto
, Tetsuya Watanabe, Mitsutoshi Shirota, Masayuki Terai, Tatsuya Kunikiyo, Kiyoshi Ishikawa, Yoshihide Ajioka, Yasutaka Horiba:
A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3463-3470 (2005) - 2001
- [j5]Niichi Itoh, Yuka Naemura, Hiroshi Makino, Yasunobu Nakase, Tsutomu Yoshihara, Yasutaka Horiba:
A 600-MHz 54×54-bit multiplier with rectangular-styled Wallace tree. IEEE J. Solid State Circuits 36(2): 249-257 (2001)
1990 – 1999
- 1999
- [j4]Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto
, Yoshio Matsuda, Shuhei Iwade, Yasutaka Horiba:
The D30V/MPEG multimedia processor. IEEE Micro 19(4): 38-47 (1999) - 1990
- [j3]Shin-ichi Nakagawa, Hideyuki Terane, Tetsuya Matsumura, Hiroshi Segawa, Masahiko Yoshimoto, Hirofumi Shinohara, Shuichi Kato, Masahiro Hatanaka, Hideo Ohira, Yoshiaki Kato, Mamoru Iwatsuki, Kinya Tabuchi, Yasutaka Horiba:
A 24-b 50-ns digital image signal processor. IEEE J. Solid State Circuits 25(6): 1484-1493 (1990)
1980 – 1989
- 1988
- [j2]Hideki Ando, Masao Nakaya, Hiroki Hona, Ihuo Iizuka, Yasutaka Horiba:
A DSP line equalizer VLSI for TCM digital subscriber-line transmission. IEEE J. Solid State Circuits 23(1): 118-123 (1988) - [j1]Toshio Kumamoto, Masao Nakaya, Shigeru Kusunoki, Tadashi Nishimura, Nobuharu Yazawa, Yoichi Akasaka, Yasutaka Horiba:
An SOI structure for flash A/D converter. IEEE J. Solid State Circuits 23(1): 198-201 (1988)
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