"A 24-b 50-ns digital image signal processor."

Shin-ichi Nakagawa et al. (1990)

> Home

Details and statistics

DOI: 10.1109/4.62184

access: closed

type: Journal Article

metadata version: 2025-01-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/NakagawaTMSYSKHOKITH90
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/NakagawaTMSYSKHOKITH90
Shin-ichi Nakagawa, Hideyuki Terane, Tetsuya Matsumura, Hiroshi Segawa, Masahiko Yoshimoto, Hirofumi Shinohara, Shuichi Kato, Masahiro Hatanaka, Hideo Ohira, Yoshiaki Kato, Mamoru Iwatsuki, Kinya Tabuchi, Yasutaka Horiba:
A 24-b 50-ns digital image signal processor. IEEE J. Solid State Circuits 25(6): 1484-1493 (1990)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.