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ORCIDHarold Ishebabi
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2010 – 2019
- 2019
[c10]Christophe Bobda, Harold Ishebabi, Philipp Mahr, Joel Mandebi Mbongue, Sujan Kumar Saha:
MeXT: A Flow for Multiprocessor Exploration. HPEC 2019: 1-7- 2018
- [j5]Christophe Bobda
, Franck Yonga, Martin Gebser, Harold Ishebabi, Torsten Schaub:
High-level synthesis of on-chip multiprocessor architectures based on answer set programming. J. Parallel Distributed Comput. 117: 161-179 (2018) - 2010
- [j4]Harold Ishebabi, Christophe Bobda:
Heuristics for Flexible CMP Synthesis. IEEE Trans. Computers 59(8): 1091-1104 (2010) - [c9]Christophe Bobda, Philipp Mahr, Benjamin Andres, Harold Ishebabi:
Application-driven architecture synthesis of on-chip Multiprocessor systems. HPCS 2010: 591-598
2000 – 2009
- 2009
- [b1]Harold Ishebabi:
Architecture synthesis for adaptive multiprocessor systems on chip. University of Potsdam, 2009, pp. 1-142 - [j3]Harold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub:
Answer Set versus Integer Linear Programming for Automatic Synthesis of Multiprocessor Systems from Real-Time Parallel Programs. Int. J. Reconfigurable Comput. 2009: 863630:1-863630:11 (2009) - [j2]Harold Ishebabi, Christophe Bobda:
Automated architecture synthesis for parallel programs on FPGA multiprocessor systems. Microprocess. Microsystems 33(1): 63-71 (2009) - [c8]Harold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub:
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs. LPNMR 2009: 598-603 - 2008
- [j1]Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embed. Comput. Syst. 7(4): 40:1-40:31 (2008) - [c7]Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures. DATE 2008: 1334-1339 - [c6]Harold Ishebabi, Philipp Mahr, Christophe Bobda:
Makespan minimization in automatic synthesis of multiprocessor systems from parallel programs. FPT 2008: 281-284 - [c5]Harold Ishebabi, Philipp Mahr, Christophe Bobda:
Automatic Synthesis of Multiprocessor Systems from Parallel Programs under Preemptive Scheduling. ReConFig 2008: 19-24 - [c4]Philipp Mahr, Christian Lorchner, Harold Ishebabi, Christophe Bobda:
SoC-MPI: A Flexible Message Passing Library for Multiprocessor Systems-on-Chips. ReConFig 2008: 187-192 - 2006
- [c3]Anupam Chattopadhyay, B. Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
Automatic ADL-based operand isolation for embedded processors. DATE 2006: 600-605 - [c2]Oguzhan Atak, Abdullah Atalar, Erdal Arikan, Harold Ishebabi, David Kammler, Gerd Ascheid, Heinrich Meyr, Mario Nicola, Guido Masera:
Design of Application Specific Processors for the Cached FFT Algorithm. ICASSP (3) 2006: 1028-1031 - [c1]Harold Ishebabi, Gerd Ascheid, Heinrich Meyr, Oguzhan Atak, Abdullah Atalar, Erdal Arikan:
An efficient parallelization technique for high throughput FFT-ASIPs. ISCAS 2006
Coauthor Index
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