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2010 – 2019
- 2018
[j4]Remigiusz Wisniewski
, Andrei Karatkevich, Marian Adamski, Anikó Costa, Luís Gomes:
Prototyping of Concurrent Control Systems With Application of Petri Nets and Comparability Graphs. IEEE Trans. Control. Syst. Technol. 26(2): 575-586 (2018)- 2016
- [j3]Manuel Bataller-Mompeán, José Miguel Martínez-Villena, Alfredo Rosado Muñoz, José Vicente Francés-Víllora, Juan Guerrero-Martínez, Marek Wegrzyn, Marian Adamski:
Support Tool for the Combined Software/Hardware Design of On-Chip ELM Training for SLFF Neural Networks. IEEE Trans. Ind. Informatics 12(3): 1114-1123 (2016) - 2015
- [c25]Kazimierz Krzywicki, Marian Adamski, Grzegorz Andrzejewski:
EmbedCloud - Design and Implementation Method of Distributed Embedded Systems. DoCEIS 2015: 157-164 - [c24]José Miguel Martínez-Villena, José Vicente Francés-Víllora, Alfredo Rosado Muñoz, Manuel Bataller-Mompeán, Juan-Francisco Guerrero-Martínez, Marek Wegrzyn, Marian Adamski:
Design environment for hardware generation of SLFF neural network topologies with ELM training capability. INDIN 2015: 868-875 - 2014
- [c23]Iwona Grobelna, Michal Grobelny, Marian Adamski:
Model Checking of UML Activity Diagrams in Logic Controllers Design. DepCoS-RELCOMEX 2014: 233-242 - [c22]Remigiusz Wisniewski, Andrei Karatkevich, Marian Adamski, Daniel Kur:
Application of comparability graphs in decomposition of Petri nets. HSI 2014: 216-220 - [c21]Lukasz Stefanowicz, Marian Adamski:
Aspects of selection of SM Components with the application of the theory of hypergraphs. HSI 2014: 221-226 - [c20]Arkadiusz Bukowiec, Jacek Tkacz, Marian Adamski, Remigiusz Wisniewski:
Dual synthesis of Petri net based dependable logic controllers for safety critical systems. HSI 2014: 243-248 - [c19]Marek Wegrzyn, Marian Adamski, Andrei Karatkevich, Alfredo Rosado Muñoz:
FPGA-based embedded Logic Controllers. HSI 2014: 249-254 - [c18]Grzegorz Bazydlo, Marian Adamski, Lukasz Stefanowicz:
Translation UML diagrams into Verilog. HSI 2014: 267-271 - [c17]Lukasz Stefanowicz, Marian Adamski, Remigiusz Wisniewski, Jakub Lipinski:
Application of Hypergraphs to SMCs Selection. DoCEIS 2014: 249-256 - 2013
- [c16]Lukasz Stefanowicz, Marian Adamski, Remigiusz Wisniewski:
Application of an Exact Transversal Hypergraph in Selection of SM-Components. DoCEIS 2013: 250-257 - [c15]Michal Doligalski, Marian Adamski:
UML state machine implementation in FPGA devices by means of dual model and Verilog. INDIN 2013: 177-184 - [c14]Arkadiusz Bukowiec, Marian Adamski:
Transition Based Synthesis with Code Markers of Petri Nets into FPGAs. PDeS 2013: 181-186 - [c13]Grzegorz Bazydlo, Marian Adamski, Marek Wegrzyn, Alfredo Rosado Muñoz:
From UML State Machine Diagram into FPGA Implementation. PDeS 2013: 298-303 - 2012
- [c12]Arkadiusz Bukowiec, Marian Adamski:
Synthesis of Petri nets into FPGA with operation flexible memories. DDECS 2012: 16-21 - [c11]Jacek Tkacz, Marian Adamski:
Logic design of structured configurable controllers. NESEA 2012: 1-6 - [c10]Marian Adamski, Jacek Tkacz:
Formal reasoning in logic design of reconfigurable controllers. PDeS 2012: 1-6 - [c9]Arkadiusz Bukowiec, Marian Adamski:
Logic synthesis for FPGAs of interpreted Petri net with common operation memory. PDeS 2012: 57-62 - [c8]Michal Grobelny, Iwona Grobelna, Marian Adamski:
Hardware behavioural modelling, verification and synthesis with UML 2.x activity diagrams. PDeS 2012: 134-139 - 2011
- [c7]Michal Doligalski, Marian Adamski:
Exceptions Handling in Hierarchical Petri Net Based Specification for Logic Controllers. ICSEng 2011: 459-460 - [c6]Grzegorz Labiak, Marian Adamski, Jacek Tkacz, Michal Doligalski, Arkadiusz Bukowiec:
Role of UML Modelling in Discrete Controller Design. ICSEng 2011: 480-481
2000 – 2009
- 2008
- [c5]Grzegorz Labiak, Marian Adamski:
Concurrent processes synchronisation in statecharts for FPGA implementation. EWDTS 2008: 59-64 - 2007
- [c4]Marian Adamski:
Logic synthesis of reconfigurable controllers. SIES 2007: 373-376 - 2001
- [c3]Arkadij Zakrevskij, Andrei Karatkevich, Marian Adamski:
A Method of Analysis of Operational Petri Nets. ACS 2001: 449-460
1990 – 1999
- 1998
- [c2]Marian Adamski:
SFC, Petri nets and application specific logic controllers. SMC 1998: 728-733 - 1994
- [j2]James Pardey, Alain Amroun, Martin Bolton, Marian Adamski:
Parallel controller synthesis for programmable logic devices. Microprocess. Microsystems 18(8): 451-457 (1994) - [j1]Marian Adamski:
Structured Logic Design with VHDL : James R Armstrong and F Gail Gray Prentice Hall International, Englewood Cliffs, NJ, USA (1993) ISBN 0 13 855206 I, £43.25, pp 482. Microprocess. Microsystems 18(10): 621-622 (1994) - [c1]Krzysztof Bilinski, Erik L. Dagless, Jonathan M. Saul, Marian Adamski:
Parallel controller synthesis from a Petri net specification. EURO-DAC 1994: 96-101
Coauthor Index
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