"Logic synthesis for FPGAs of interpreted Petri net with common operation ..."

Arkadiusz Bukowiec, Marian Adamski (2012)

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DOI: 10.3182/20120523-3-CZ-3015.00013

access: open

type: Conference or Workshop Paper

metadata version: 2021-02-09

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  dblp key:
  - conf/pdes/BukowiecA12
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  - https://dblp.org/rec/conf/pdes/BukowiecA12
Arkadiusz Bukowiec, Marian Adamski:
Logic synthesis for FPGAs of interpreted Petri net with common operation memory. PDeS 2012: 57-62

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