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ORCIDVinay Saripalli
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2020 – today
- 2024
[c11]Prasanth Mangalagiri
, Lynn Qian, Farrukh Zafar, Praveen Mosalikanti, Phoebe Chang, Arun Kurian, Vinay Saripalli:
CDLS: Constraint Driven Generative AI Framework for Analog Layout Synthesis. DAC 2024: 80:1-80:6
2010 – 2019
- 2013
- [j4]Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Design of energy-efficient circuits and systems using tunnel field effect transistors. IET Circuits Devices Syst. 7(5): 294-303 (2013) - [j3]Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Steep-Slope Devices: From Dark to Dim Silicon. IEEE Micro 33(5): 50-59 (2013) - 2012
- [c10]Emre Kultursay, Karthik Swaminathan, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores. CODES+ISSS 2012: 245-254 - [c9]Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir:
Design space exploration of workload-specific last-level caches. ISLPED 2012: 243-248 - [c8]Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan:
Ultra Low Power Circuit Design Using Tunnel FETs. ISVLSI 2012: 153-158 - 2011
- [j2]Vinay Saripalli, Guangyu Sun, Asit K. Mishra, Yuan Xie, Suman Datta, Vijaykrishnan Narayanan:
Exploiting Heterogeneity for Energy Efficiency in Chip Multiprocessors. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(2): 109-119 (2011) - [c7]Vinay Saripalli, Asit K. Mishra, Suman Datta, Vijaykrishnan Narayanan:
An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores. DAC 2011: 729-734 - [c6]Vijaykrishnan Narayanan, Vinay Saripalli, Karthik Swaminathan, Ravindhiran Mukundrajan, Guangyu Sun, Yuan Xie, Suman Datta:
Enabling architectural innovations using non-volatile memory. ACM Great Lakes Symposium on VLSI 2011: 439-444 - [c5]Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores. ISLPED 2011: 247-252 - [c4]Vinay Saripalli, Suman Datta, Vijaykrishnan Narayanan, Jaydeep P. Kulkarni:
Variation-tolerant ultra low-power heterojunction tunnel FET SRAM design. NANOARCH 2011: 45-52 - 2010
- [j1]Vinay Saripalli, Lu Liu, Suman Datta, Vijaykrishnan Narayanan:
Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits. J. Low Power Electron. 6(3): 415-428 (2010) - [c3]Vinay Saripalli, Vijaykrishnan Narayanan, Suman Datta:
Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors. VLSI Design 2010: 399-404
2000 – 2009
- 2009
- [c2]Vinay Saripalli, Vijaykrishnan Narayanan, Suman Datta:
Ultra Low Energy Binary Decision Diagram Circuits Using Few Electron Transistors. NanoNet 2009: 200-209 - 2008
- [c1]Soumya Eachempati, Vinay Saripalli, Narayanan Vijaykrishnan, Suman Datta:
Reconfigurable BDD based quantum circuits. NANOARCH 2008: 61-67
Coauthor Index
aka: Vijaykrishnan Narayanan
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