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2000 – 2009
- 2009
[c45]Bing Li, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy:
A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators. ISCAS 2009: 1545-1548- 2008
- [j19]Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan, Ka Nang Leung
:
A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. IEEE Trans. Circuits Syst. II Express Briefs 55-II(7): 653-657 (2008) - [c44]Misteltein Pak-Kee Chan, Oliver Chiu-sing Choy, Kong-Pang Pun, Cheong-Fat Chan, Alex Ka Nang Leung:
Enhanced channel selection using digital low-IF in Weaver receiver architecture. APCCAS 2008: 33-36 - 2007
- [j18]Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Priority-Based Heading One Detector in H.264/AVC Decoding. EURASIP J. Embed. Syst. 2007 (2007) - [j17]Ke Xu, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing. IEEE Trans. Circuits Syst. II Express Briefs 54-II(11): 984-988 (2007) - [j16]Wei Han, Kwok-Wai Hon, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. J. VLSI Signal Process. 47(3): 223-232 (2007) - 2006
- [j15]Kong-Pang Pun, Wang Tung Cheng, Chiu-Sing Choy, Cheong-Fat Chan:
A 75-dB image rejection IF-input quadrature-sampling SC ΣΔ Modulator. IEEE J. Solid State Circuits 41(6): 1353-1363 (2006) - [c43]Wang-Chi Cheng, Cheong-Fat Chan, Suyi Tao, King-Keung Mok:
0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application. APCCAS 2006: 25-28 - [c42]Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy:
Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS 2006: 195-198 - [c41]King-Keung Mok, Ka-Hung Tsang, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
Adiabatic Smart Card. APCCAS 2006: 287-290 - [c40]Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy:
0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS 2006: 522-525 - [c39]Chi-Hong Chan, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS 2006 - [c38]Wei Han, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
An efficient MFCC extraction method in speech recognition. ISCAS 2006 - [c37]Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan:
A 0.5V fully differential OTA with local common feedback. ISCAS 2006 - [c36]Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS 2006 - [c35]Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan:
A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS 2006 - [c34]Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS 2006 - 2005
- [c33]Wang Tung Cheng, Kong-Pang Pun, Chiu-Sing Choy, Cheong-Fat Chan:
A 75dB image rejection IF-input quadrature sampling SC ΣΔ modulator. ESSCIRC 2005: 455-458 - [c32]Pui-Tak So, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun:
Ramp voltage supply using adiabatic charging principle. ISCAS (3) 2005: 2152-2155 - [c31]Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan:
Active RC filter with reduced capacitance by current division technique. ISCAS (4) 2005: 3279-3282 - [c30]Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-Fat Chan, Kong-Pang Pun:
Realization of card-centric framework: a card-centric computer [smart cards]. ISCAS (5) 2005: 4999-5002 - [c29]Wei Han, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun:
A speech recognizer with selectable model parameters. ISCAS (6) 2005: 5842-5845 - 2004
- [j14]Jing-Ling Yang, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(10): 1484-1494 (2004) - [j13]Ragnarok Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
A low-latency asynchronous shift register. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 217-221 (2004) - [j12]Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José Epifânio da Franca:
An I/Q mismatch-free switched-capacitor complex sigma-delta Modulator. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 254-256 (2004) - [j11]Pak-Kee Chan, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Preparing smartcard for the future: from passive to active. IEEE Trans. Consumer Electron. 50(1): 245-250 (2004) - [j10]Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy:
High Speed Curve Interpolating D/A Converter. J. VLSI Signal Process. 38(1): 5-11 (2004) - [c28]Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-Fat Chan, Kong-Pang Pun:
A low power asynchronous Java processor for contactless smart card. ASP-DAC 2004: 553-554 - [c27]Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS 2004: 225-240 - [c26]Junhua Shen, Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan:
An IF input continuous-time sigma-delta analog-digital converter with high image rejection. ICECS 2004: 101-104 - [c25]Wing-Kin Chan, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
An asynchronous SOVA decoder for wireless communication application. ISCAS (2) 2004: 517-520 - [c24]Wang Tung Cheng, Kong-Pang Pun, Cheong-Fat Chan, Chiu-sing Choy:
An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. ISCAS (1) 2004: 1140-1143 - [c23]Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710 - 2003
- [j9]Kin-Pui Ho, Cheong-Fat Chan, Chiu-Sing Choy, Kong-Pang Pun:
Reversed nested Miller compensation with voltage buffer and nulling resistor. IEEE J. Solid State Circuits 38(10): 1735-1738 (2003) - [c22]W. K. Yeung, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun:
Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). ISCAS (2) 2003: 185-187 - [c21]Pak-Keung Leung, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
A low power asynchronous GF(2173) ALU for elliptic curve crypto-processor. ISCAS (5) 2003: 337-340 - [c20]Wei Han, Kwok-Wai Hon, Cheong-Fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching:
An HMM-based speech recognition IC. ISCAS (2) 2003: 744-747 - [c19]Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430 - 2002
- [c18]Wang-Chi Cheng, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) 2002: 1-4 - [c17]Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun:
A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32 - [c16]Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy:
A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. ISCAS (3) 2002: 137-140 - [c15]Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José E. Franca:
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224 - [c14]Wang-Chi Cheng, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
A 1.2 V 900 MHz CMOS mixer. ISCAS (5) 2002: 365-368 - [c13]Kin-Pui Ho, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun:
A CMOS current feedback operational amplifier with active current mode compensation. ISCAS (1) 2002: 709-712 - 2001
- [j8]Jing-Ling Yang, Chiu-Sing Choy, Cheong-Fat Chan:
A self-timed divider using a new fast and robust pipeline scheme. IEEE J. Solid State Circuits 36(6): 917-923 (2001) - [j7]Jan Butas, Chiu-Sing Choy, Juraj Povazanec, Cheong-Fat Chan:
Asynchronous cross-pipelined multiplier. IEEE J. Solid State Circuits 36(8): 1272-1275 (2001) - [j6]Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-Fat Chan:
A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers 50(9): 992-997 (2001) - [c12]Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan:
A low power asynchronous DES. ISCAS (4) 2001: 538-541 - [c11]Lai-Kan Leung, Cheong-Fat Chan, Oliver Chiu-sing Choy:
A giga-hertz CMOS digital controlled oscillator. ISCAS (4) 2001: 610-613 - [c10]Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan:
A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. ISCAS (4) 2001: 910-913 - 2000
- [j5]Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy:
CMOS high speed interpolators based on parallel architecture. IEEE Trans. Consumer Electron. 46(2): 326-329 (2000) - [j4]Hongwei Wang, Cheong-Fat Chan, Chiu-sing Choy:
High speed CMOS digital-to-analog converter with linear interpolator. IEEE Trans. Consumer Electron. 46(4): 1137-1142 (2000) - [c9]Tin-Y. Tang, Chiu-sing Choy, Pui-Lam Siu, Cheong-Fat Chan:
Design of self-timed asynchronous Booth's multiplier. ASP-DAC 2000: 15-16 - [c8]Tin-Yau Tang, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan:
An ALU design using a novel asynchronous pipeline architecture. ISCAS 2000: 361-364 - [c7]Wing-Sum Mak, Cheong-Fat Chan, Ka-Wai Cheung, Chiu-Sing Choy:
An 8×8 adiabatic quasi-static CMOS multiplier. ISCAS 2000: 553-556
1990 – 1999
- 1999
- [j3]Vincent Wing-Yun Sit, Chiu-Sing Choy, Cheong-Fat Chan:
A four-phase handshaking asynchronous static RAM design for self-timed systems. IEEE J. Solid State Circuits 34(1): 90-96 (1999) - [j2]Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Wai-kuen Cham:
A self-timed ICT chip for image coding. IEEE Trans. Circuits Syst. Video Technol. 9(6): 856-860 (1999) - [c6]Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-Fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-Ling Yang, Tin-yan Tang:
Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223 - 1998
- [c5]Oliver Chiu-sing Choy, Tin-Chak Johnson Pang, Juraj Povazanec, Cheong-Fat Chan:
A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO 1998: 10212- - [c4]Juraj Povazanec, Chiu-Sing Choy, Cheong-Fat Chan:
Asynchronous logic in bit-serial arithmetic. ICECS 1998: 175-178 - 1997
- [c3]Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Wai-kuen Cham:
Self-timed 1-D ICT processor. ASP-DAC 1997: 669-670 - 1996
- [j1]Oliver Chiu-sing Choy, Lap-kong Chan, Ray Chan, Cheong-Fat Chan:
Test Generation with Dynamic Probe Points in High Observability Testing Environment. IEEE Trans. Computers 45(1): 88-96 (1996) - 1995
- [c2]Chiu-sing Choy, Cheong-Fat Chan, M. H. Ku:
A Feedback Control Circuit Design Technique to Suppress Power Noise in High Speed Output Driver. ISCAS 1995: 307-310 - 1994
- [c1]W. Y. Lo, Chiu-sing Choy, Cheong-Fat Chan:
Hardware emulation board based on FPGAs and programmable interconnections. RSP 1994: 126-130
Coauthor Index
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