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ORCIDIlker Hamzaoglu
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Books and Theses
- 1999
[b1]Ilker Hamzaoglu:
Test Pattern Generation and Test Application Time Reduction Algorithms for VLSI Circuits. University of Illinois Urbana-Champaign, USA, 1999
Journal Articles
- 2024
- [j33]Waqar Ahmad
, Hossein Mahdavi, Ilker Hamzaoglu:
An efficient versatile video coding motion estimation hardware. J. Real Time Image Process. 21(2): 25 (2024) - 2023
- [j32]Mustafa Ghanim, Ozgur Tasdizen, H. Fatih Ugurdag, Ilker Hamzaoglu:
An efficient algorithm for disparity map compression based on spatial correlations and its low-cost hardware architecture. Integr. 93: 102069 (2023) - 2021
- [j31]Waqar Ahmad, Berke Ayrancioglu, Ilker Hamzaoglu:
Low Error Efficient Approximate Adders for FPGAs. IEEE Access 9: 117232-117243 (2021) - [j30]Hossein Mahdavi, Hasan Azgin, Ilker Hamzaoglu:
Approximate Versatile Video Coding Fractional Interpolation Filters and Their Hardware Implementations. IEEE Trans. Consumer Electron. 67(3): 186-194 (2021) - 2020
- [j29]Ercan Kalali, Ilker Hamzaoglu:
An Approximate HEVC Intra Angular Prediction Hardware. IEEE Access 8: 2599-2607 (2020) - 2018
- [j28]Yusuf Aksehir, Kamil Erdayandi, Tevfik Zafer Ozcan, Ilker Hamzaoglu:
A low energy adaptive motion estimation hardware for H.264 multiview video coding. J. Real Time Image Process. 15(1): 3-12 (2018) - [j27]Ercan Kalali, Yusuf Adibelli, Ilker Hamzaoglu:
A low energy intra prediction hardware for high efficiency video coding. J. Real Time Image Process. 15(2): 221-234 (2018) - [j26]Ercan Kalali, Ilker Hamzaoglu:
Approximate HEVC Fractional Interpolation Filters and Their Hardware Implementations. IEEE Trans. Consumer Electron. 64(3): 285-291 (2018) - 2017
- [j25]Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu:
A computation and energy reduction technique for HEVC intra prediction. IEEE Trans. Consumer Electron. 63(1): 36-43 (2017) - [j24]Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
High performance 2D transform hardware for future video coding. IEEE Trans. Consumer Electron. 63(2): 117-125 (2017) - [j23]Ercan Kalali, Ilker Hamzaoglu:
Low complexity 2D adaptive image processing algorithm and its hardware implementation. IEEE Trans. Consumer Electron. 63(3): 277-284 (2017) - [j22]Hasan Azgin, Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
Reconfigurable intra prediction hardware for future video coding. IEEE Trans. Consumer Electron. 63(4): 419-425 (2017) - 2016
- [j21]Ercan Kalali, Ahmet Can Mert, Ilker Hamzaoglu:
A computation and energy reduction technique for HEVC Discrete Cosine Transform. IEEE Trans. Consumer Electron. 62(2): 166-174 (2016) - 2014
- [j20]Erdem Ozcan, Ercan Kalali, Yusuf Adibelli, Ilker Hamzaoglu:
A computation and energy reduction technique for HEVC intra mode decision. IEEE Trans. Consumer Electron. 60(4): 745-753 (2014) - [j19]Ercan Kalali, Erdem Ozcan, Ozgun Mert Yalcinkaya, Ilker Hamzaoglu:
A low energy HEVC inverse transform hardware. IEEE Trans. Consumer Electron. 60(4): 754-761 (2014) - 2013
- [j18]Erdem Ozcan, Yusuf Adibelli, Ilker Hamzaoglu:
A high performance deblocking filter hardware for high efficiency video coding. IEEE Trans. Consumer Electron. 59(3): 714-720 (2013) - 2012
- [j17]Merve Peyic, Hakan Baba, Erdem Guleyuboglu, Ilker Hamzaoglu, Mehmet Keskinöz:
A low power multi-rate decoder hardware for IEEE 802.11n LDPC codes. Microprocess. Microsystems 36(3): 159-166 (2012) - [j16]Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu:
Computation and power reduction techniques for H.264 intra prediction. Microprocess. Microsystems 36(3): 205-214 (2012) - [j15]Abdulkadir Akin, Mert Cetin, Tevfik Zafer Ozcan, Burak Erbagci, Ilker Hamzaoglu:
An adaptive bilateral motion estimation algorithm and its hardware architecture. IEEE Trans. Consumer Electron. 58(2): 712-720 (2012) - 2011
- [j14]Mert Cetin, Ilker Hamzaoglu:
An adaptive true motion estimation algorithm for frame rate conversion of high definition video and its hardware implementations. IEEE Trans. Consumer Electron. 57(2): 923-931 (2011) - [j13]Aydin Aysu, Gokhan Sayilar, Ilker Hamzaoglu:
A low energy adaptive hardware for H.264 multiple reference frame motion estimation. IEEE Trans. Consumer Electron. 57(3): 1377-1383 (2011) - [j12]Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu:
Energy reduction techniques for H.264 deblocking filter hardware. IEEE Trans. Consumer Electron. 57(3): 1399-1407 (2011) - 2010
- [j11]Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu:
Pixel similarity based computation and power reduction technique for H.264 intra prediction. IEEE Trans. Consumer Electron. 56(2): 1079-1087 (2010) - [j10]Abdulkadir Akin, Gokhan Sayilar, Ilker Hamzaoglu:
High performance hardware architectures for one bit transform based single and multiple reference frame motion estimation. IEEE Trans. Consumer Electron. 56(2): 1144-1152 (2010) - 2009
- [j9]Anil Çelebi, Oguzhan Urhan, Ilker Hamzaoglu, Sarp Ertürk:
Efficient Hardware Implementations of Low Bit Depth Motion Estimation Algorithms. IEEE Signal Process. Lett. 16(6): 513-516 (2009) - [j8]Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu:
High performance hardware architectures for one bit transform based motion estimation. IEEE Trans. Consumer Electron. 55(2): 941-949 (2009) - [j7]Ozgur Tasdizen, Abdulkadir Akin, Halil Kukner, Ilker Hamzaoglu:
Dynamically variable step search motion estimation algorithm and a dynamically reconfigurable hardware for its implementation. IEEE Trans. Consumer Electron. 55(3): 1645-1653 (2009) - 2008
- [j6]Mustafa Parlak, Ilker Hamzaoglu:
Low power H.264 deblocking filter hardware implementations. IEEE Trans. Consumer Electron. 54(2): 808-816 (2008) - [j5]Ilker Hamzaoglu, Özgür Tasdizen, Esra Sahin:
An efficient H.264 intra frame coder system. IEEE Trans. Consumer Electron. 54(4): 1903-1911 (2008) - [j4]Anil Çelebi, Orhan Akbulut, Oguzhan Urhan, Ilker Hamzaoglu, Sarp Ertürk:
An all binary sub-pixel motion estimation approach and its hardware architecture. IEEE Trans. Consumer Electron. 54(4): 1928-1937 (2008) - [j3]Mustafa Parlak, Yusuf Adibelli, Ilker Hamzaoglu:
A novel computational complexity and power reduction technique for H.264 intra prediction. IEEE Trans. Consumer Electron. 54(4): 2006-2014 (2008) - 2000
- [j2]Ilker Hamzaoglu, Janak H. Patel:
Test set compaction algorithms for combinational circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(8): 957-963 (2000) - 1999
- [j1]Ilker Hamzaoglu, Janak H. Patel:
New Techniques for Deterministic Test Pattern Generation. J. Electron. Test. 15(1-2): 63-73 (1999)
Conference and Workshop Papers
- 2022
- [c67]Ilker Hamzaoglu, Berke Ayrancioglu, Hasan Azgin:
Low Error Approximate Absolute Difference Hardware. ICCE 2022: 1-6 - [c66]Ilker Hamzaoglu, Hossein Mahdavi, Elif Taskin:
FPGA Implementations of VVC Fractional Interpolation Using High-Level Synthesis. ICCE 2022: 1-6 - 2021
- [c65]Waqar Ahmad, Ilker Hamzaoglu:
An Efficient Approximate Sum of Absolute Differences Hardware for FPGAs. ICCE 2021: 1-5 - [c64]Hossein Mahdavi, Ilker Hamzaoglu:
An Efficient HEVC Fractional Interpolation Hardware. ICCE 2021: 1-4 - [c63]Hossein Mahdavi, Ilker Hamzaoglu:
A VVC Fractional Interpolation Hardware Using Memory Based Constant Multiplication. ICCE 2021: 1-5 - 2020
- [c62]Waqar Ahmad, Berke Ayrancioglu, Ilker Hamzaoglu:
Comparison of Approximate Circuits for H.264 and HEVC Motion Estimation. DSD 2020: 167-173 - [c61]Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu:
A Novel Approximate Constant Multiplier and HEVC Discrete Cosine Transform Case Study. ICCE-Berlin 2020: 1-6 - [c60]Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu:
An Approximate Versatile Video Coding Fractional Interpolation Hardware. ICCE 2020: 1-4 - 2019
- [c59]Ahmet Can Mert, Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu:
Novel Approximate Absolute Difference Hardware. DSD 2019: 190-193 - [c58]Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu:
An Efficient FPGA Implementation of Versatile Video Coding Intra Prediction. DSD 2019: 194-199 - 2018
- [c57]Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
A Low Power Versatile Video Coding (VVC) Fractional Interpolation Hardware. DASIP 2018: 43-47 - [c56]Hasan Azgin, Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
A Reconfigurable Fractional Interpolation Hardware for VVC Motion Compensation. DSD 2018: 99-103 - [c55]Ahmet Can Mert, Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu:
Efficient Multiple Constant Multiplication Using DSP Blocks in FPGA. FPL 2018: 331-334 - [c54]Hasan Azgin, Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
An efficient FPGA implementation of HEVC intra prediction. ICCE 2018: 1-5 - [c53]Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
An HEVC fractional interpolation hardware using memory based constant multiplication. ICCE 2018: 1-5 - 2017
- [c52]Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
An FPGA implementation of future video coding 2D transform. ICCE-Berlin 2017: 31-36 - [c51]Ercan Kalali, Ahmet Can Mert, Ilker Hamzaoglu:
Pixel correlation based computation and energy reduction techniques for HEVC fractional interpolation. ICCE-Berlin 2017: 37-41 - 2016
- [c50]Abdulkadir Akin, Ilker Hamzaoglu:
A high performance hardware for early terminated C-1BT based motion estimation. DTIS 2016: 1-4 - [c49]Firas Abdul Ghani, Ercan Kalali, Ilker Hamzaoglu:
FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis. DTIS 2016: 1-4 - [c48]Ilker Hamzaoglu:
Low power digital video compression hardware design. DTIS 2016: 1 - [c47]Ahmet Can Mert, Ercan Kalali, Ilker Hamzaoglu:
Low complexity HEVC sub-pixel motion estimation technique and its hardware implementation. ICCE-Berlin 2016: 159-162 - [c46]Ercan Kalali, Ilker Hamzaoglu:
FPGA implementation of HEVC intra prediction using high-level synthesis. ICCE-Berlin 2016: 163-166 - 2015
- [c45]Ercan Kalali, Ilker Hamzaoglu:
FPGA implementations of HEVC Inverse DCT using high-level synthesis. DASIP 2015: 1-6 - [c44]Ercan Kalali, Ilker Hamzaoglu:
A low energy 2D adaptive median filter hardware. DATE 2015: 725-729 - 2014
- [c43]Hasan Azgin, Serkan Yaliman, Ilker Hamzaoglu:
A high performance alternating projections image demosaicing hardware. FPL 2014: 1-4 - [c42]Ilker Hamzaoglu, Aydin Aysu, Onur Can Ulusel:
A low power adaptive H.264 video encoder hardware. ICCE-Berlin 2014: 395-399 - [c41]Ercan Kalali, Ilker Hamzaoglu:
A low energy HEVC sub-pixel interpolation hardware. ICIP 2014: 1218-1222 - 2013
- [c40]Erdem Ozcan, Yusuf Adibelli, Ilker Hamzaoglu:
A high performance deblocking filter hardware for High Efficiency Video Coding. FPL 2013: 1-4 - [c39]Ercan Kalali, Erdem Ozcan, Ozgun Mert Yalcinkaya, Ilker Hamzaoglu:
A low energy HEVC Inverse DCT hardware. ICCE-Berlin 2013: 123-124 - [c38]Ercan Kalali, Yusuf Adibelli, Ilker Hamzaoglu:
A Reconfigurable HEVC sub-pixel interpolation hardware. ICCE-Berlin 2013: 125-128 - [c37]Yusuf Adibelli, Ilker Hamzaoglu:
A high performance and low energy hardware for intra prediction with Template Matching. VLSI-SoC 2013: 282-285 - 2012
- [c36]Yusuf Aksehir, Kamil Erdayandi, Tevfik Zafer Ozcan, Ilker Hamzaoglu:
A low energy adaptive motion estimation hardware for H.264 Multiview Video Coding. DASIP 2012: 1-6 - [c35]Ercan Kalali, Yusuf Adibelli, Ilker Hamzaoglu:
A high performance and low energy intra prediction hardware for HEVC video decoding. DASIP 2012: 1-8 - [c34]Ercan Kalali, Yusuf Adibelli, Ilker Hamzaoglu:
A high performance and low energy intra prediction hardware for High Efficiency Video Coding. FPL 2012: 719-722 - 2011
- [c33]Caglar Kalaycioglu, Ilker Hamzaoglu:
Dynamic Power Estimation for Motion Estimation Hardware. DSD 2011: 279-282 - [c32]Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu:
An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion. DSD 2011: 309-315 - [c31]Abdulkadir Akin, Onur Can Ulusel, Tevfik Zafer Ozcan, Gokhan Sayilar, Ilker Hamzaoglu:
A Novel Power Reduction Technique for Block Matching Motion Estimation Hardware. FPL 2011: 269-272 - [c30]Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu:
A novel energy reduction technique for H.264 intra mode decision. ICIP 2011: 385-388 - 2010
- [c29]Abdulkadir Akin, Gokhan Sayilar, Ilker Hamzaoglu:
A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation. DATE 2010: 393-398 - [c28]Ozgur Tasdizen, Ilker Hamzaoglu:
Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation. DSD 2010: 731-736 - [c27]Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu:
A Computation and Power Reduction Technique for H.264 Intra Prediction. DSD 2010: 753-760 - [c26]Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu:
Pixel Similarity Based Computation and Power Reduction Technique for H.264 Intra Prediction. FPL 2010: 171-174 - [c25]Ozgur Tasdizen, Ilker Hamzaoglu:
Recursive Dynamically Variable Step Search Motion Estimation Algorithm for High Definition Video. ICPR 2010: 2354-2357 - [c24]Mert Cetin, Ilker Hamzaoglu:
An Adaptive True Motion Estimation Algorithm for Frame Rate Conversion of High Definition Video. ICPR 2010: 4109-4112 - [c23]Abdulkadir Akin, Mert Cetin, Burak Erbagci, Ozgur Karakaya, Ilker Hamzaoglu:
An adaptive bilateral motion estimation algorithm and its hardware architecture. VLSI-SoC 2010: 207-212 - 2009
- [c22]Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilker Hamzaoglu:
A high performance reconfigurable Motion Estimation hardware architecture. DATE 2009: 882-885 - [c21]Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu:
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation. DSD 2009: 691-698 - [c20]Ozgur Tasdizen, Ilker Hamzaoglu:
A Reconfigurable Frame Interpolation Hardware Architecture for High Definition Video. DSD 2009: 714-719 - [c19]Caglar Kalaycioglu, Onur Can Ulusel, Ilker Hamzaoglu:
Low power techniques for Motion Estimation hardware. FPL 2009: 180-185 - 2007
- [c18]Mustafa Parlak, Ilker Hamzaoglu:
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm. AHS 2007: 127-133 - [c17]Esra Sahin, Ilker Hamzaoglu:
Interactive presentation: An efficient hardware architecture for H.264 intra prediction algorithm. DATE 2007: 183-188 - [c16]Serkan Oktem, Ilker Hamzaoglu:
An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation. DSD 2007: 444-447 - [c15]Esra Sahin, Ilker Hamzaoglu:
An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding. DSD 2007: 448-454 - [c14]Ilker Hamzaoglu, Ozgur Tasdizen, Esra Sahin:
An efficient H.264 intra frame coder system design. VLSI-SoC 2007: 200-205 - 2006
- [c13]Mustafa Parlak, Ilker Hamzaoglu:
An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter. AHS 2006: 381-385 - [c12]Sinan Yalcin, Ilker Hamzaoglu:
A High Performance Hardware Architecture for Half-Pixel Accurate H.264 Motion Estimation. VLSI-SoC 2006: 63-67 - 2005
- [c11]Esra Sahin, Ilker Hamzaoglu:
A high performance and low power hardware architecture for H.264 CAVLC algorithm. EUSIPCO 2005: 1-4 - [c10]Ozgur Tasdizen, Ilker Hamzaoglu:
A high performance and low cost hardware architecture for H.264 transform and quantization algorithms. EUSIPCO 2005: 1-4 - [c9]Sinan Yalcin, Hasan F. Ates, Ilker Hamzaoglu:
A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding. FPL 2005: 509-514 - 2000
- [c8]Ilker Hamzaoglu, Janak H. Patel:
Deterministic Test Pattern Generation Techniques for Sequential Circuits. ICCAD 2000: 538-543 - [c7]Ilker Hamzaoglu, Janak H. Patel:
Reducing Test Application Time for Built-in-Self-Test Test Pattern Generators. VTS 2000: 369-376 - 1999
- [c6]Ilker Hamzaoglu, Janak H. Patel:
Reducing Test Application Time for Full Scan Embedded Cores. FTCS 1999: 260-267 - 1998
- [c5]Ilker Hamzaoglu, Janak H. Patel:
Test set compaction algorithms for combinational circuits. ICCAD 1998: 283-289 - [c4]Ilker Hamzaoglu, Janak H. Patel:
Compact two-pattern test set generation for combinational and full scan circuits. ITC 1998: 944-953 - [c3]Ilker Hamzaoglu, Janak H. Patel:
New Techniques for Deterministic Test Pattern Generation. VTS 1998: 446-452 - 1997
- [c2]Hillol Kargupta, Brian Stafford, Ilker Hamzaoglu:
Web Based Parallel/Distributed Medical Data Mining Using Software Agents. AMIA 1997 - [c1]Hillol Kargupta, Ilker Hamzaoglu, Brian Stafford:
Scalable, Distributed Data Mining - An Agent Architecture. KDD 1997: 211-214
Coauthor Index
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