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ORCIDTsukasa Oishi
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2010 – 2019
- 2014
[c6]Ryota Yasudo
, Takahiro Kagami, Hideharu Amano, Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura:
A low power NoC router using the marching memory through type. COOL Chips 2014: 1-3- [c5]Ryota Yasudo, Takahiro Kagami, Hideharu Amano, Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura:
Design of a low power NoC router using Marching Memory Through type. NOCS 2014: 111-118 - 2013
- [j2]Yasunobu Nakase, Yasuhiro Ido, Tsukasa Oishi, Toru Shimizu:
On-Chip Single-Inductor Dual-Output DC-DC Boost Converter Having Off-Chip Power Transistor Drive and Micro-Computer Controlled MPPT Modes. IEICE Trans. Electron. 96-C(11): 1420-1427 (2013) - [j1]Yasunobu Nakase, Shinichi Hirose, Hiroshi Onoda, Yasuhiro Ido, Yoshiaki Shimizu, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu:
0.5 V Start-Up 87% Efficiency 0.75 mm2 On-Chip Feed-Forward Single-Inductor Dual-Output (SIDO) Boost DC-DC Converter for Battery and Solar Cell Operation Sensor Network Micro-Computer Integration. IEEE J. Solid State Circuits 48(8): 1933-1942 (2013) - 2012
- [c4]Yasunobu Nakase, Shinichi Hirose, Hiroshi Onoda, Yasuhiro Ido, Yoshiaki Shimizu, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu:
A 0.5V start-up 87% efficiency 0.75mm2 on-chip feed-forward single-inductor dual-output (SIDO) boost DC-DC converter for battery and solar cell operation sensor network micro-computer integration. CICC 2012: 1-4 - 2011
- [c3]Yasunobu Nakase, Shinichi Hirose, Toru Goda, Kehui Hu, Hiroshi Onoda, Yasuhiro Ido, Hiroyuki Kondo, Wei Kong, Wei Zhang, Tsukasa Oishi, Shintaro Mori, Toru Shimizu:
0.8V start-up 92% efficiency on-chip boost DC-DC converters for battery operation micro-computers. A-SSCC 2011: 21-24
2000 – 2009
- 2008
- [c2]Shinji Kawai, Akira Hosogane, Shigehiro Kuge, Toshihiro Abe, Kohei Hashimoto, Tsukasa Oishi, Naoki Tsuji, Kiyohiko Sakakibara, Kenji Noguchi:
An 8kB EEPROM-Emulation DataFLASH Module for Automotive MCU. ISSCC 2008: 508-509
1980 – 1989
- 1989
- [c1]Yoshio Matsuda, Kazutami Arimoto, Masaki Tsukude, Tsukasa Oishi, Kazuyasu Fujishima:
A New Array Architecture for Parallel Testing in VLSI Memories. ITC 1989: 322-326
Coauthor Index
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