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2000 – 2009
- 2009
[j13]Josep Carmona
, Jordi Cortadella, Michael Kishinevsky, Alexander Taubin:
Elastic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(10): 1437-1455 (2009)- [j12]Jordi Cortadella, Alexander Taubin:
Guest Editorial: Special Section on Asynchronous Circuits and Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(7): 853-854 (2009) - [c24]Alexander B. Smirnov, Alexander Taubin:
Heuristic Based throughput Analysis and Optimization of Asynchronous Pipelines. ASYNC 2009: 162-172 - 2008
- [c23]Konrad J. Kulikowski, Vyas Venkataraman, Zhen Wang, Alexander Taubin:
Power Balanced Gates Insensitive to Routing Capacitance Mismatch. DATE 2008: 1280-1285 - [c22]Konrad J. Kulikowski, Vyas Venkataraman, Zhen Wang, Alexander Taubin, Mark G. Karpovsky:
Asynchronous balanced gates tolerant to interconnect variability. ISCAS 2008: 3190-3193 - 2007
- [j11]Tejpal Singh, Alexander Taubin:
A Highly Scalable GALS Crossbar Using Token Ring Arbitration. IEEE Des. Test Comput. 24(5): 464-472 (2007) - [j10]Alexander Taubin, Jordi Cortadella, Luciano Lavagno, Alex Kondratyev, Ad M. G. Peeters:
Design Automation of Real-Life Asynchronous Devices and Systems. Found. Trends Electron. Des. Autom. 2(1): 1-133 (2007) - [j9]Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin:
Robust codes and robust, fault-tolerant architectures of the Advanced Encryption Standard. J. Syst. Archit. 53(2-3): 139-149 (2007) - 2006
- [c21]Konrad J. Kulikowski, Alexander B. Smirnov, Alexander Taubin:
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks. CHES 2006: 399-413 - [c20]Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin:
Fault Attack Resistant Cryptographic Hardware with Uniform Error Detection. FDTC 2006: 185-195 - [c19]Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin:
DPA on Faulty Cryptographic Hardware and Countermeasures. FDTC 2006: 211-222 - [c18]Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin:
Power Attacks on Secure Hardware Based on Early Propagation of Data. IOLTS 2006: 131-138 - 2005
- [c17]Alexander B. Smirnov, Alexander Taubin, Ming Su, Mark G. Karpovsky:
An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library. ACSD 2005: 68-76 - [c16]Konrad J. Kulikowski, Ming Su, Alexander B. Smirnov, Alexander Taubin, Mark G. Karpovsky, Daniel MacDonald:
Delay Insensitive Encoding and Power Analysis: A Balancing Act. ASYNC 2005: 116-125 - 2004
- [j8]Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Yosinori Watanabe:
Quasi-static Scheduling for Concurrent Architectures. Fundam. Informaticae 62(2): 171-196 (2004) - [j7]Mark G. Karpovsky, Alexander Taubin:
New Class of Nonlinear Systematic Error Detecting Codes. IEEE Trans. Inf. Theory 50(8): 1818-1820 (2004) - [c15]Mark G. Karpovsky, Konrad J. Kulikowski, Alexander Taubin:
Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard. CARDIS 2004: 177-192 - [c14]Mark G. Karpovsky, Konrad J. Kulikowski, Alexander Taubin:
Robust Protection against Fault-Injection Attacks on Smart Cards Implementing the Advanced Encryption Standard. DSN 2004: 93-101 - 2002
- [j6]Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(2): 109-130 (2002) - [c13]Alex Kondratyev, Oriol Roig, Lawrence Neukom, Karl Fant, Alexander Taubin:
Checking Delay-Insensitivity: 104 Gates and Beyond. ASYNC 2002: 149-157 - [c12]Alexander Taubin, Karl Fant, John McCardle:
Design of Delay-Insensitive Three Dimension Pipeline Array Multiplier for Image Processing. ICCD 2002: 104-111 - 2000
- [c11]Michiel M. Ligthart, Karl Fant, Ross Smith, Alexander Taubin, Alex Kondratyev:
Asynchronous Design Using Commercial HDL Synthesis Tools. ASYNC 2000: 114-
1990 – 1999
- 1999
- [c10]Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno:
Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. ASYNC 1999: 36- - 1998
- [j5]Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Sergei Ten:
Analysis of Petri Nets by Ordering Relations in Reduced Unfoldings. Formal Methods Syst. Des. 12(1): 5-38 (1998) - [j4]Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Jordi Cortadella, Luciano Lavagno:
The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. J. Circuits Syst. Comput. 8(1): 67-118 (1998) - [j3]Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin:
Partial-scan delay fault testing of asynchronous circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(11): 1184-1199 (1998) - [c9]Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. ACSD 1998: 152-163 - [c8]Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems: application to timing optimization of asynchronous circuits. ICCAD 1998: 324-331 - 1997
- [c7]Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Coupling Asynchrony and Interrupts: Place Chart Nets. ICATPN 1997: 328-347 - [c6]Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin:
Partial scan delay fault testing of asynchronous circuits. ICCAD 1997: 728-735 - 1996
- [c5]Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Sergei Ten:
A Structural Approach for the Analysis of Petri Nets by Reduced Unfoldings. Application and Theory of Petri Nets 1996: 346-365 - 1994
- [j2]Michael Kishinevsky, Alex Kondratyev, Alexander Taubin, Victor Varshavsky:
Analysis and Identification of Speed-Independent Circuits on an Event Model. Formal Methods Syst. Des. 4(1): 33-75 (1994) - [j1]Michael Kishinevsky, Alex Kondratyev, Alexander Taubin:
Specification and analysis of self-timed circuits. J. VLSI Signal Process. 7(1-2): 117-135 (1994) - [c4]Alex Kondratyev, Alexander Taubin:
Verification of the speed-independent circuits by STG unfoldings. ASYNC 1994: 64-75 - [c3]Alex Kondratyev, Alexander Taubin, Victor Varshavsky, Michael Kishinevsky, Edwige E. Pissaloux:
Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems. PDP 1994: 220-226 - 1992
- [c2]Michael Kishinevsky, Alex Kondratyev, Alexander Taubin, Victor Varshavsky:
Analysis and Identification of Self-Timed Circuits. Designing Correct Circuits 1992: 275-287 - 1991
- [c1]Michael Kishinevsky, Alex Kondratyev, Alexander Taubin:
Formal method for self-timed design. EURO-DAC 1991: 197-201
Coauthor Index
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