default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDJavier Hormigo
Person information
- affiliation: University of Malaga, Spain
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
Journal Articles
- 2024
[j23]Raul Murillo
, Javier Hormigo, Alberto A. Del Barrio, Guillermo Botella:
HUB Meets Posit: Arithmetic Units Implementation. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 440-444 (2024)- 2022
- [j22]Julio Villalba, Javier Hormigo:
High-Radix Formats for Enhancing Floating-Point FPGA Implementations. Circuits Syst. Signal Process. 41(3): 1683-1703 (2022) - 2021
- [j21]Javier Hormigo, Sergio D. Muñoz:
Efficient Floating-Point Givens Rotation Unit. Circuits Syst. Signal Process. 40(5): 2419-2442 (2021) - 2020
- [j20]Sonia González-Navarro, Javier Hormigo:
New Results on Non-Normalized Floating-Point Formats. IEEE Trans. Computers 69(12): 1733-1744 (2020) - 2019
- [j19]Javier Hormigo, Andrés Rodríguez:
Designing a Project for Learning Industry 4.0 by Applying IoT to Urban Garden. Rev. Iberoam. de Tecnol. del Aprendiz. 14(2): 58-65 (2019) - [j18]Julio Villalba, Javier Hormigo, Sonia González-Navarro:
Fast HUB Floating-Point Adder for FPGA. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 1028-1032 (2019) - 2018
- [j17]Julio Villalba-Moreno, Javier Hormigo, Sonia González-Navarro:
Unbiased Rounding for HUB Floating-Point Addition. IEEE Trans. Computers 67(9): 1359-1365 (2018) - 2017
- [j16]Javier Hormigo, Jean-Michel Muller, Stuart F. Oberman, Nathalie Revol, Arnaud Tisserand, Julio Villalba-Moreno:
Introduction to the Special Issue on Computer Arithmetic. IEEE Trans. Computers 66(12): 1991-1993 (2017) - [j15]Javier Hormigo, Julio Villalba:
HUB Floating Point for Improving FPGA Implementations of DSP Applications. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 319-323 (2017) - 2016
- [j14]Javier Hormigo, Julio Villalba:
New Formats for Computing with Real-Numbers under Round-to-Nearest. IEEE Trans. Computers 65(7): 2158-2168 (2016) - [j13]Javier Hormigo, Julio Villalba:
Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2369-2377 (2016) - 2015
- [j12]Sergio D. Muñoz, Javier Hormigo:
High-Throughput FPGA Implementation of QR Decomposition. IEEE Trans. Circuits Syst. II Express Briefs 62-II(9): 861-865 (2015) - 2013
- [j11]Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Multioperand Redundant Adders on FPGAs. IEEE Trans. Computers 62(10): 2013-2025 (2013) - [j10]Javier Hormigo, Gabriel Caffarena, Juan P. Oliver, Eduardo I. Boemo:
Self-Reconfigurable Constant Multiplier for FPGA. ACM Trans. Reconfigurable Technol. Syst. 6(3): 14:1-14:17 (2013) - 2012
- [j9]Sonia González-Navarro, Javier Hormigo, Michael J. Schulte:
A study of decimal left shifters for binary numbers. Inf. Comput. 216: 47-56 (2012) - [j8]Julio Villalba, Tomás Lang, Javier Hormigo:
Radix-2 Multioperand and Multiformat Streaming Online Addition. IEEE Trans. Computers 61(6): 790-803 (2012) - 2011
- [j7]Francisco J. Jaime, M. A. Sánchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
High-Speed Algorithms and Architectures for Range Reduction Computation. IEEE Trans. Very Large Scale Integr. Syst. 19(3): 512-516 (2011) - 2010
- [j6]Francisco J. Jaime, Miguel A. Sanchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Enhanced Scaling-Free CORDIC. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1654-1662 (2010) - 2008
- [j5]Francisco J. Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata:
Pipelined Architecture for Additive Range Reduction. J. Signal Process. Syst. 53(1-2): 103-112 (2008) - 2006
- [j4]Joaquín Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides, Emilio L. Zapata:
SAD computation based on online arithmetic for motion estimation. Microprocess. Microsystems 30(5): 250-258 (2006) - 2004
- [j3]Javier Hormigo, Julio Villalba, Emilio L. Zapata:
CORDIC Processor for Variable-Precision Interval Arithmetic. J. VLSI Signal Process. 37(1): 21-39 (2004) - 1999
- [j2]Gabriel Cristóbal, Javier Hormigo:
Texture segmentation through eigen-analysis of the Pseudo-Wigner distribution. Pattern Recognit. Lett. 20(3): 337-345 (1999) - 1998
- [j1]Javier Hormigo, Gabriel Cristóbal:
High resolution spectral analysis of images using the pseudo-Wigner distribution. IEEE Trans. Signal Process. 46(6): 1757-1763 (1998)
Conference and Workshop Papers
- 2023
- [c30]Marco Hormigo-Jiménez, Javier Hormigo:
High-Throughput DTW accelerator with minimum area in AMD FPGA by HLS. DCIS 2023: 1-6 - 2021
- [c29]Javier Hormigo, Gabriel Caffarena:
FPGA acceleration of bit-true simulations for word-length optimization. ARITH 2021: 119-122 - 2020
- [c28]Javier Hormigo, Julio Villalba-Moreno, Sonia Gonzalez-Navarro:
Floating-Point Fused Multiply-Add under HUB Format. ARITH 2020: 1-8 - 2019
- [c27]Julio Villalba-Moreno, Javier Hormigo, Francisco J. Jaime:
Reproducible Summation Under HUB Format. ARITH 2019: 38-45 - 2017
- [c26]Sonia González-Navarro, Javier Hormigo:
Normalizing or Not Normalizing? An Open Question for Floating-Point Arithmetic in Embedded Systems. ARITH 2017: 188-195 - [c25]Julio Villalba-Moreno, Javier Hormigo:
Floating Point Square Root under HUB Format. ICCD 2017: 447-454 - 2015
- [c24]Javier Hormigo, Julio Villalba:
Simplified floating-point units for high dynamic range image and video systems. ISCE 2015: 1-2 - [c23]Sergio D. Muñoz, Javier Hormigo:
Improving fixed-point implementation of QR decomposition by rounding-to-nearest. ISCE 2015: 1-2 - 2014
- [c22]Javier Hormigo, Julio Villalba:
Optimizing DSP circuits by a new family of arithmetic operators. ACSSC 2014: 871-875 - 2013
- [c21]Julio Villalba, Javier Hormigo, Francisco Corbera, Mario A. González, Emilio L. Zapata:
Efficient floating-point representation for balanced codes for FPGA devices. ICCD 2013: 272-277 - 2011
- [c20]Carlos Diego Moreno-Moreno, Pilar Martínez, Francisco Bellido, Javier Hormigo, Manuel Ortiz, Francisco J. Quiles:
Convolution Computation in FPGA Based on Carry-Save Adders and Circular Buffers. IT Revolutions 2011: 237-248 - 2010
- [c19]Francisco J. Quiles, Manuel Ortiz, María Brox, Carlos Diego Moreno-Moreno, Javier Hormigo, Julio Villalba:
UCORE: Reconfigurable Platform for Educational Purposes. ReConFig 2010: 109-114 - [c18]Murugappan Senthilvelan, Javier Hormigo, Joon Hwa Chun, Mihai Sima, Daniel Iancu, Michael J. Schulte, John Glossner:
CORDIC-based LMMSE equalizer for Software Defined Radio. ICSAMOS 2010: 301-308 - 2009
- [c17]Javier Hormigo, Manuel Ortiz, Francisco J. Quiles, Francisco J. Jaime, Julio Villalba, Emilio L. Zapata:
Efficient Implementation of Carry-Save Adders in FPGAs. ASAP 2009: 207-210 - [c16]Carlos Diego Moreno-Moreno, Francisco J. Quiles, Manuel Ortiz, María Brox, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Efficient mapping on FPGA of convolution computation based on combined CSA-CPA accumulator. ICECS 2009: 419-422 - 2008
- [c15]Francisco J. Jaime, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
SIMD Enhancements for a Hough Transform Implementation. DSD 2008: 899-903 - [c14]Francisco J. Jaime, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
New SIMD instructions set for image processing applications enhancement. ICIP 2008: 1396-1399 - 2007
- [c13]Julio Villalba, Javier Hormigo, Tomás Lang:
Improving the Throughput of On-line Addition for Data Streams. ASAP 2007: 272-277 - 2006
- [c12]Francisco J. Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata:
Pipelined Range Reduction for Floating Point Numbers. ASAP 2006: 145-152 - [c11]Joaquín Olivares, Ignacio Benavides, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA. FPL 2006: 1-4 - 2005
- [c10]Julio Villalba, Javier Hormigo, Jose M. Prades, Emilio L. Zapata:
On-line Multioperand Addition Based on On-line Full Adders. ASAP 2005: 322-327 - 2004
- [c9]Joaquín Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides:
Minimum Sum of Absolute Differences Implementation in a Single FPGA Device. FPL 2004: 986-990 - [c8]Gerardo Bandera, Mario A. González, Julio Villalba, Javier Hormigo, Emilio L. Zapata:
Evaluation of Elementary Functions Using Multimedia Features. IPDPS 2004 - 2003
- [c7]Gabriel Cristóbal, Sylvain Fischer, Manuel Forero-Vargas, Rafael Redondo, Javier Hormigo:
Texture segmentation and analysis using local spectral methods. ISSPA (1) 2003: 129-132 - 2002
- [c6]Julio Villalba, Gerardo Bandera, Mario A. González, Javier Hormigo, Emilio L. Zapata:
Polynomial Evaluation on Multimedia Processors. ASAP 2002: 265- - 2000
- [c5]Javier Hormigo, Julio Villalba, Michael J. Schulte:
A Hardware Algorithm for Variable-Precision Logarithm. ASAP 2000: 215-224 - [c4]Julio Villalba, Javier Hormigo, Mario A. González, Emilio L. Zapata:
MMX-Like Architecture Extension to Support the Rotation Operation. IEEE International Conference on Multimedia and Expo (III) 2000: 1383-1386 - 1999
- [c3]Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Interval Sine and Cosine Functions Computation Based on Variable-Precision CORDIC Algorithm. IEEE Symposium on Computer Arithmetic 1999: 186-193 - [c2]Javier Hormigo, Julio Villalba, Emilio L. Zapata:
Arithmetic Unit for the Computation of Interval Elementary Functions. EUROMICRO 1999: 1063-1066 - 1998
- [c1]Javier Hormigo, Julio Villalba, Emilio L. Zapata:
A Hardware Approach to Interval Arithmetic for Sine and Cosine Functions. SCAN 1998: 31-41
Editorship
- 2016
- [e1]Paolo Montuschi, Michael J. Schulte, Javier Hormigo, Stuart F. Oberman, Nathalie Revol:
23nd IEEE Symposium on Computer Arithmetic, ARITH 2016, Silicon Valley, CA, USA, July 10-13, 2016. IEEE Computer Society 2016, ISBN 978-1-5090-1616-7 [contents]
Informal and Other Publications
- 2020
- [i1]Javier Hormigo, Sergio D. Muñoz:
Efficient Floating-Point Givens Rotation Unit. CoRR abs/2010.12376 (2020)
Coauthor Index
aka: Julio Villalba-Moreno
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-08-05 21:15 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
