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2020 – today
- 2022
[j11]Ivan Fernandez
, Ricardo Quislant, Sonia Gonzalez-Navarro, Eladio Gutiérrez, Oscar G. Plata:
TraTSA: A Transprecision Framework for Efficient Time Series Analysis. J. Comput. Sci. 63: 101784 (2022)- 2021
- [j10]Yasir Mahmood Qureshi, Jose Manuel Herruzo, Marina Zapater, Katzalin Olcoz, Sonia Gonzalez-Navarro, Oscar G. Plata, David Atienza:
Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures. IEEE Trans. Computers 70(12): 2218-2233 (2021) - [j9]Jose Manuel Herruzo, Ivan Fernandez, Sonia González-Navarro, Oscar G. Plata:
Enabling fast and energy-efficient FM-index exact matching using processing-near-memory. J. Supercomput. 77(9): 10226-10251 (2021) - 2020
- [j8]Sonia González-Navarro, Javier Hormigo:
New Results on Non-Normalized Floating-Point Formats. IEEE Trans. Computers 69(12): 1733-1744 (2020) - [j7]Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez-Marín, Víctor Viñals Yúfera, Jesús Alastruey-Benedé, Oscar G. Plata:
Accelerating Sequence Alignments Based on FM-Index Using the Intel KNL Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 17(4): 1093-1104 (2020) - [c9]Javier Hormigo, Julio Villalba-Moreno, Sonia Gonzalez-Navarro:
Floating-Point Fused Multiply-Add under HUB Format. ARITH 2020: 1-8
2010 – 2019
- 2019
- [j6]Julio Villalba, Javier Hormigo, Sonia González-Navarro:
Fast HUB Floating-Point Adder for FPGA. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 1028-1032 (2019) - [c8]Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez, Víctor Viñals, Jesús Alastruey-Benedé, Oscar G. Plata:
Boosting Backward Search Throughput for FM-Index Using a Compressed Encoding. DCC 2019: 577 - 2018
- [j5]Julio Villalba-Moreno, Javier Hormigo, Sonia González-Navarro:
Unbiased Rounding for HUB Floating-Point Addition. IEEE Trans. Computers 67(9): 1359-1365 (2018) - 2017
- [c7]Sonia González-Navarro, Javier Hormigo:
Normalizing or Not Normalizing? An Open Question for Floating-Point Arithmetic in Embedded Systems. ARITH 2017: 188-195 - 2016
- [j4]Carlos Garcia-Vega, Sonia González-Navarro, Pedro Balboa-La Chica, Julio Villalba-Moreno:
Decimal Multiformat Online Addition. IEEE Trans. Computers 65(10): 3203-3209 (2016) - 2013
- [j3]Sonia González-Navarro, Charles Tsen, Michael J. Schulte:
Binary Integer Decimal-Based Floating-Point Multiplication. IEEE Trans. Computers 62(7): 1460-1466 (2013) - 2012
- [j2]Sonia González-Navarro, Javier Hormigo, Michael J. Schulte:
A study of decimal left shifters for binary numbers. Inf. Comput. 216: 47-56 (2012) - [c6]Carlos Garcia-Vega, Sonia González-Navarro, Julio Villalba, Emilio L. Zapata:
Decimal online multioperand addition. ACSCC 2012: 350-354 - [c5]Carlos Garcia-Vega, Sonia González-Navarro, Julio Villalba-Moreno, Emilio L. Zapata:
On-line Decimal Adder with RBCD Representation. ASAP 2012: 53-60 - 2011
- [j1]Samuel Tsen, Sonia González-Navarro, Michael J. Schulte, Katherine Compton:
Hardware Designs for Binary Integer Decimal-Based Rounding. IEEE Trans. Computers 60(5): 614-627 (2011)
2000 – 2009
- 2009
- [c4]Charles Tsen, Sonia González-Navarro, Michael J. Schulte, Brian J. Hickmann, Katherine Compton:
A Combined Decimal and Binary Floating-Point Multiplier. ASAP 2009: 8-15 - [c3]Sonia González-Navarro, Juan López, Angeles G. Navarro, Emilio L. Zapata:
Analytical Model of Patching and Load Sharing in a Distributed VoD System. PDPTA 2009: 357-363 - 2007
- [c2]Charles Tsen, Michael J. Schulte, Sonia González-Navarro:
Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit. ASAP 2007: 115-121 - [c1]Charles Tsen, Sonia González-Navarro, Michael J. Schulte:
Hardware design of a Binary Integer Decimal-based floating-point adder. ICCD 2007: 288-295
Coauthor Index
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